[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [Xen-devel] [PATCH v2] x86/emul: Implement the STAC and CLAC instructions
Note that unlike most privilege restricted instructions, STAC and CLAC are documented to raise #UD rather than #GP[0], and indeed do so. Signed-off-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> --- CC: Jan Beulich <JBeulich@xxxxxxxx> v2: * Exclude the use of legacy prefixes. Their exclusion is undocumented but consistent with observed behaviour and the other Grp7 instructions. * Drop the %cr4 check. Introduce a CPUID check instead. --- xen/arch/x86/x86_emulate/x86_emulate.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/xen/arch/x86/x86_emulate/x86_emulate.c b/xen/arch/x86/x86_emulate/x86_emulate.c index fe055cf..dfb6f47 100644 --- a/xen/arch/x86/x86_emulate/x86_emulate.c +++ b/xen/arch/x86/x86_emulate/x86_emulate.c @@ -433,6 +433,7 @@ typedef union { #define CR4_OSXMMEXCPT (1<<10) #define CR4_UMIP (1<<11) #define CR4_OSXSAVE (1<<18) +#define CR4_SMAP (1<<21) /* EFLAGS bit definitions. */ #define EFLG_ID (1<<21) @@ -1295,6 +1296,7 @@ static bool vcpu_has( #define vcpu_has_bmi1() vcpu_has( 7, EBX, 3, ctxt, ops) #define vcpu_has_hle() vcpu_has( 7, EBX, 4, ctxt, ops) #define vcpu_has_rtm() vcpu_has( 7, EBX, 11, ctxt, ops) +#define vcpu_has_smap() vcpu_has( 7, EBX, 20, ctxt, ops) #define vcpu_must_have(feat) \ generate_exception_if(!vcpu_has_##feat(), EXC_UD) @@ -4354,6 +4356,18 @@ x86_emulate( switch( modrm ) { + case 0xca: /* clac */ + case 0xcb: /* stac */ + vcpu_must_have(smap); + generate_exception_if( + lock_prefix || vex.pfx || + (_regs.eflags & EFLG_VM) || !mode_ring0(), EXC_UD); + + _regs.eflags &= ~EFLG_AC; + if ( modrm == 0xcb ) + _regs.eflags |= EFLG_AC; + goto no_writeback; + #ifdef __XEN__ case 0xd1: /* xsetbv */ { -- 2.1.4 _______________________________________________ Xen-devel mailing list Xen-devel@xxxxxxxxxxxxx https://lists.xen.org/xen-devel
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