Re: [Xen-devel] [PATCH v3 4/4] x86/asm: Rewrite sync_core() to use IRET-to-self

[Andy Lutomirski <luto@xxxxxxxxxxxxxx>]

On Tue, Dec 6, 2016 at 1:49 AM, Jan Beulich <JBeulich@xxxxxxxx> wrote:
>>>> On 06.12.16 at 10:25, <peterz@xxxxxxxxxxxxx> wrote:
>> On Tue, Dec 06, 2016 at 01:46:37AM -0700, Jan Beulich wrote:
>>> > +  asm volatile (
>>> > +          "pushfl\n\t"
>>> > +          "pushl %%cs\n\t"
>>> > +          "pushl $1f\n\t"
>>> > +          "iret\n\t"
>>> > +          "1:"
>>> > +          : "+r" (__sp) : : "cc", "memory");
>>>
>>> I don't thing EFLAGS (i.e. "cc") gets modified anywhere here. And
>>> the memory clobber would perhaps better be pulled out into an
>>> explicit barrier() invocation (making it more obvious what it's needed
>>> for)?
>>
>> EVerything that implies a memory barrier (and I think serializing
>> instructions do that) also imply a compiler barrier.
>>
>> Not doing the memory clobber gets you inconsistency wrt everything else.
>
> Well, I didn't say dropping the memory clobber altogether, but
> split it into a separate barrier() invocation (placed perhaps after
> the #endif).

I'll add a comment.  I'm fixing up the constraints, too.  (Although if
gcc allocated tmp into rsp, that would be very strange indeed.)

--Andy

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