Re: [Xen-devel] [PATCH v4 4/8] monitor: ARM SMC events

[Tamas K Lengyel <tamas@xxxxxxxxxxxxx>]

> On ARMv8, ESR_EL2.ISS has a different encoding depending on the state (i.e
> AArch64 or AArch32). See D7-1861 in ARM DDI 0487A.i. Furthermore, in AArch32
> state, the ARMv8 specs permits to trap conditional SMC instructions that
> fail their condition check (see D7-1897 in ARM DDI 0406C.c).

Hi Julien,
I'm unable to find the reference you mention about conditional SMCs
generating Hyp traps even if they fail their condition checks on
certain implementations. The only references I find in ARMv8 manual
states explicitly that "The trap that HCR_EL2.TSC enables traps the
attempted execution of a conditional SMC instruction only if the
instruction passes its condition code check" (D1.15) and "The
architecture requires that a Hyp trap on a conditional SMC instruction
generates an exception only if the instruction passes its condition
code check, see Trapping use of the SMC instruction on page G1-3510"
(G1.16).

Tamas

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