Re: [Xen-devel] [PATCH V6 2/3] drivers/pl011: Use combination of UARTRIS and UARTMSC instead of UARTMIS

[Julien Grall <julien.grall@xxxxxxx>]

On 07/06/16 15:03, Shanker Donthineni wrote:
> Hi Julien,
>
> On 06/07/2016 08:58 AM, Julien Grall wrote:
> > Hello Shanker,
> >
> > On 06/06/16 23:58, Shanker Donthineni wrote:
> > > The Masked interrupt status register (UARTMIS) is not described in ARM
> > > SBSA 2.x document. Anding of two registers UARTMSC and UARTRIS values
> > > gives the same information as register UARTMIS.
> > >
> > > UARTRIS, UARTMSC and UARTMIS definitions are found in PrimeCell UART
> > > PL011 (Revision: r1p4).
> > >    - 3.3.10 Interrupt mask set/clear register, UARTIMSC
> > >    - 3.3.11 Raw interrupt status register, UARTRIS
> > >    - 3.3.12 Masked interrupt status register, UARTMIS
> > >
> > > This change is necessary for driver to be SBSA compliant v2.x without
> > > affecting the current driver functionality.
> > >
> > > Signed-off-by: Shanker Donthineni <shankerd@xxxxxxxxxxxxxx>
> > > ---
> > >     Fixed typo in commit text.
> > >
> > >    xen/drivers/char/pl011.c | 7 +++++--
> > >    1 file changed, 5 insertions(+), 2 deletions(-)
> > >
> > > diff --git a/xen/drivers/char/pl011.c b/xen/drivers/char/pl011.c
> > > index 6a3c21b..755a965 100644
> > > --- a/xen/drivers/char/pl011.c
> > > +++ b/xen/drivers/char/pl011.c
> > > @@ -57,7 +57,10 @@ static void pl011_interrupt(int irq, void *data, struct 
> > > cpu_user_regs *regs)
> > >    {
> > >        struct serial_port *port = data;
> > >        struct pl011 *uart = port->uart;
> > > -    unsigned int status = pl011_read(uart, MIS);
> > > +    unsigned int status;
> > > +
> > > +    /* UARTMIS is not documented in SBSA v2.x, so using UARTRIS/UARTIMSC */
> > > +    status = pl011_read(uart, RIS) & pl011_read(uart, IMSC);
> > Please use an helper here to avoid code duplication and have the comment in 
> > both place.
> Sure, I'll move to a separate function 'pl011_intr_status(uart)'. Do you have 
> any other comment?
None so far.

Regards,

--
Julien Grall

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