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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [Xen-devel] [PATCH RESEND 04/14] tools: add ACPI tables relevant definitions
On Tue, 31 May 2016, Shannon Zhao wrote:
> From: Shannon Zhao <shannon.zhao@xxxxxxxxxx>
>
> Add ACPI tables relevant definitions for generating ACPI tables for ARM
> guest later. Currently RSDP, XSDT, GTDT, MADT, FADT and DSDT tables will
> be used.
>
> Signed-off-by: Shannon Zhao <shannon.zhao@xxxxxxxxxx>
> ---
> tools/libxc/include/acpi_defs.h | 277
> ++++++++++++++++++++++++++++++++++++++++
> 1 file changed, 277 insertions(+)
> create mode 100644 tools/libxc/include/acpi_defs.h
>
> diff --git a/tools/libxc/include/acpi_defs.h b/tools/libxc/include/acpi_defs.h
> new file mode 100644
> index 0000000..9389a96
> --- /dev/null
> +++ b/tools/libxc/include/acpi_defs.h
> @@ -0,0 +1,277 @@
> +#ifndef _ACPI_DEFS_H_
> +#define _ACPI_DEFS_H_
> +
> +#define ACPI_BUILD_APPNAME6 "XenARM"
> +#define ACPI_BUILD_APPNAME4 "Xen "
This header is actually ARM specific (also see the gic stuff below). It
is probably best to rename it to acpi_arm_defs.h.
> +#pragma pack (1)
> +
> +/* Root System Description Pointer Structure. */
> +struct acpi_rsdp_descriptor { /* Root System Descriptor Pointer */
> + uint64_t signature; /* ACPI signature, contains "RSD PTR "
> */
> + uint8_t checksum; /* To make sum of struct == 0 */
> + uint8_t oem_id[6]; /* OEM identification */
> + uint8_t revision; /* Must be 0 for 1.0, 2 for 2.0 */
> + uint32_t rsdt_physical_address; /* 32-bit physical address of RSDT */
> + uint32_t length; /* XSDT Length in bytes including hdr */
> + uint64_t xsdt_physical_address; /* 64-bit physical address of XSDT */
> + uint8_t extended_checksum; /* Checksum of entire table */
> + uint8_t reserved[3]; /* Reserved field must be 0 */
> +};
> +
> +/* ACPI common table header. */
> +struct acpi_table_header {
> + uint32_t signature; /* ACPI signature (4 ASCII characters) */ \
> + uint32_t length; /* Length of table, in bytes, including
> header */ \
> + uint8_t revision; /* ACPI Specification minor version #
> */ \
> + uint8_t checksum; /* To make sum of entire table == 0 */ \
> + uint8_t oem_id[6]; /* OEM identification */ \
> + uint8_t oem_table_id[8]; /* OEM table identification */ \
> + uint32_t oem_revision; /* OEM revision number */ \
> + uint8_t asl_compiler_id[4]; /* ASL compiler vendor ID */ \
> + uint32_t asl_compiler_revision; /* ASL compiler revision number */
> +};
> +
> +/* Extended System Description Table (XSDT). */
> +struct acpi_xsdt_descriptor {
> + struct acpi_table_header header;
> + uint64_t entry[0];
> +};
> +
> +/* Generic Timer Description Table (GTDT). */
> +#define ACPI_GTDT_INTERRUPT_MODE 0
> +#define ACPI_GTDT_INTERRUPT_POLARITY 1
> +#define ACPI_GTDT_ALWAYS_ON 2
> +
> +/* Triggering */
> +#define ACPI_LEVEL_SENSITIVE ((uint8_t) 0x00)
> +#define ACPI_EDGE_SENSITIVE ((uint8_t) 0x01)
> +
> +/* Polarity */
> +#define ACPI_ACTIVE_HIGH ((uint8_t) 0x00)
> +#define ACPI_ACTIVE_LOW ((uint8_t) 0x01)
> +
> +struct acpi_gtdt_descriptor {
> + struct acpi_table_header header;
> + uint64_t counter_block_addresss;
> + uint32_t reserved;
> + uint32_t secure_el1_interrupt;
> + uint32_t secure_el1_flags;
> + uint32_t non_secure_el1_interrupt;
> + uint32_t non_secure_el1_flags;
> + uint32_t virtual_timer_interrupt;
> + uint32_t virtual_timer_flags;
> + uint32_t non_secure_el2_interrupt;
> + uint32_t non_secure_el2_flags;
> + uint64_t counter_read_block_address;
> + uint32_t platform_timer_count;
> + uint32_t platform_timer_offset;
> +};
> +
> +/* Multiple APIC Description Table header definition (MADT). */
> +struct acpi_madt_descriptor
> +{
> + struct acpi_table_header header; /* ACPI common table header */
> + uint32_t local_apic_address; /* Physical address of local APIC */
> + uint32_t flags;
> +};
> +
> +/* Values for Type in APIC sub-headers. */
> +
> +#define ACPI_APIC_PROCESSOR 0
> +#define ACPI_APIC_IO 1
> +#define ACPI_APIC_XRUPT_OVERRIDE 2
> +#define ACPI_APIC_NMI 3
> +#define ACPI_APIC_LOCAL_NMI 4
> +#define ACPI_APIC_ADDRESS_OVERRIDE 5
> +#define ACPI_APIC_IO_SAPIC 6
> +#define ACPI_APIC_LOCAL_SAPIC 7
> +#define ACPI_APIC_XRUPT_SOURCE 8
> +#define ACPI_APIC_LOCAL_X2APIC 9
> +#define ACPI_APIC_LOCAL_X2APIC_NMI 10
> +#define ACPI_APIC_GENERIC_INTERRUPT 11
> +#define ACPI_APIC_GENERIC_DISTRIBUTOR 12
> +#define ACPI_APIC_GENERIC_MSI_FRAME 13
> +#define ACPI_APIC_GENERIC_REDISTRIBUTOR 14
> +#define ACPI_APIC_RESERVED 15 /* 15 and greater are reserved
> */
> +
> +/*
> + * MADT sub-structures (Follow MULTIPLE_APIC_DESCRIPTION_TABLE).
> + */
> +#define ACPI_SUB_HEADER_DEF /* Common ACPI sub-structure header */\
> + uint8_t type; \
> + uint8_t length;
> +
> +/* Sub-structures for MADT */
> +
> +struct acpi_madt_generic_interrupt {
> + ACPI_SUB_HEADER_DEF
> + uint16_t reserved;
> + uint32_t cpu_interface_number;
> + uint32_t uid;
> + uint32_t flags;
> + uint32_t parking_version;
> + uint32_t performance_interrupt;
> + uint64_t parked_address;
> + uint64_t base_address;
> + uint64_t gicv_base_address;
> + uint64_t gich_base_address;
> + uint32_t vgic_interrupt;
> + uint64_t gicr_base_address;
> + uint64_t arm_mpidr;
> +};
> +
> +struct acpi_madt_generic_distributor {
> + ACPI_SUB_HEADER_DEF
> + uint16_t reserved;
> + uint32_t gic_id;
> + uint64_t base_address;
> + uint32_t global_irq_base;
> + uint8_t version;
> + uint8_t reserved2[3];
> +};
> +
> +struct acpi_madt_generic_msi_frame {
> + ACPI_SUB_HEADER_DEF
> + uint16_t reserved;
> + uint32_t gic_msi_frame_id;
> + uint64_t base_address;
> + uint32_t flags;
> + uint16_t spi_count;
> + uint16_t spi_base;
> +};
> +
> +struct acpi_madt_generic_redistributor {
> + ACPI_SUB_HEADER_DEF
> + uint16_t reserved;
> + uint64_t base_address;
> + uint32_t range_length;
> +};
> +
> +enum {
> + ACPI_FADT_F_WBINVD,
> + ACPI_FADT_F_WBINVD_FLUSH,
> + ACPI_FADT_F_PROC_C1,
> + ACPI_FADT_F_P_LVL2_UP,
> + ACPI_FADT_F_PWR_BUTTON,
> + ACPI_FADT_F_SLP_BUTTON,
> + ACPI_FADT_F_FIX_RTC,
> + ACPI_FADT_F_RTC_S4,
> + ACPI_FADT_F_TMR_VAL_EXT,
> + ACPI_FADT_F_DCK_CAP,
> + ACPI_FADT_F_RESET_REG_SUP,
> + ACPI_FADT_F_SEALED_CASE,
> + ACPI_FADT_F_HEADLESS,
> + ACPI_FADT_F_CPU_SW_SLP,
> + ACPI_FADT_F_PCI_EXP_WAK,
> + ACPI_FADT_F_USE_PLATFORM_CLOCK,
> + ACPI_FADT_F_S4_RTC_STS_VALID,
> + ACPI_FADT_F_REMOTE_POWER_ON_CAPABLE,
> + ACPI_FADT_F_FORCE_APIC_CLUSTER_MODEL,
> + ACPI_FADT_F_FORCE_APIC_PHYSICAL_DESTINATION_MODE,
> + ACPI_FADT_F_HW_REDUCED_ACPI,
> + ACPI_FADT_F_LOW_POWER_S0_IDLE_CAPABLE,
> +};
> +
> +enum {
> + ACPI_FADT_ARM_USE_PSCI_G_0_2 = 0,
> + ACPI_FADT_ARM_PSCI_USE_HVC = 1,
> +};
> +
> +struct acpi_generic_address {
> + uint8_t space_id; /* Address space where struct or register
> exists */
> + uint8_t bit_width; /* Size in bits of given register */
> + uint8_t bit_offset; /* Bit offset within the register */
> + uint8_t access_width; /* Minimum Access size (ACPI 3.0) */
> + uint64_t address; /* 64-bit address of struct or register */
> +};
> +
> +struct acpi_fadt_descriptor {
> + struct acpi_table_header header; /* ACPI common table header */ \
> + uint32_t firmware_ctrl; /* Physical address of FACS */ \
> + uint32_t dsdt; /* Physical address of DSDT */ \
> + uint8_t model; /* System Interrupt Model */ \
> + uint8_t reserved1; /* Reserved */ \
> + uint16_t sci_int; /* System vector of SCI interrupt */ \
> + uint32_t smi_cmd; /* Port address of SMI command port */ \
> + uint8_t acpi_enable; /* Value to write to smi_cmd to enable ACPI */ \
> + uint8_t acpi_disable; /* Value to write to smi_cmd to disable ACPI */ \
> + /* Value to write to SMI CMD to enter S4BIOS state */ \
> + uint8_t S4bios_req; \
> + uint8_t reserved2; /* Reserved - must be zero */ \
> + /* Port address of Power Mgt 1a acpi_event Reg Blk */ \
> + uint32_t pm1a_evt_blk; \
> + /* Port address of Power Mgt 1b acpi_event Reg Blk */ \
> + uint32_t pm1b_evt_blk; \
> + uint32_t pm1a_cnt_blk; /* Port address of Power Mgt 1a Control Reg Blk
> */ \
> + uint32_t pm1b_cnt_blk; /* Port address of Power Mgt 1b Control Reg Blk
> */ \
> + uint32_t pm2_cnt_blk; /* Port address of Power Mgt 2 Control Reg Blk */
> \
> + uint32_t pm_tmr_blk; /* Port address of Power Mgt Timer Ctrl Reg Blk
> */ \
> + /* Port addr of General Purpose acpi_event 0 Reg Blk */ \
> + uint32_t gpe0_blk; \
> + /* Port addr of General Purpose acpi_event 1 Reg Blk */ \
> + uint32_t gpe1_blk; \
> + uint8_t pm1_evt_len; /* Byte length of ports at pm1_x_evt_blk */ \
> + uint8_t pm1_cnt_len; /* Byte length of ports at pm1_x_cnt_blk */ \
> + uint8_t pm2_cnt_len; /* Byte Length of ports at pm2_cnt_blk */ \
> + uint8_t pm_tmr_len; /* Byte Length of ports at pm_tm_blk */ \
> + uint8_t gpe0_blk_len; /* Byte Length of ports at gpe0_blk */ \
> + uint8_t gpe1_blk_len; /* Byte Length of ports at gpe1_blk */ \
> + uint8_t gpe1_base; /* Offset in gpe model where gpe1 events start */
> \
> + uint8_t reserved3; /* Reserved */ \
> + uint16_t plvl2_lat; /* Worst case HW latency to enter/exit C2 state
> */ \
> + uint16_t plvl3_lat; /* Worst case HW latency to enter/exit C3 state
> */ \
> + uint16_t flush_size; /* Size of area read to flush caches */ \
> + uint16_t flush_stride; /* Stride used in flushing caches */ \
> + uint8_t duty_offset; /* Bit location of duty cycle field in p_cnt reg
> */ \
> + uint8_t duty_width; /* Bit width of duty cycle field in p_cnt reg */ \
> + uint8_t day_alrm; /* Index to day-of-month alarm in RTC CMOS RAM */
> \
> + uint8_t mon_alrm; /* Index to month-of-year alarm in RTC CMOS RAM
> */ \
> + uint8_t century; /* Index to century in RTC CMOS RAM */
> + /* IA-PC Boot Architecture Flags (see below for individual flags) */
> + uint16_t boot_flags;
> + uint8_t reserved; /* Reserved, must be zero */
> + /* Miscellaneous flag bits (see below for individual flags) */
> + uint32_t flags;
> + /* 64-bit address of the Reset register */
> + struct acpi_generic_address reset_register;
> + /* Value to write to the reset_register port to reset the system */
> + uint8_t reset_value;
> + /* ARM-Specific Boot Flags (see below for individual flags) (ACPI 5.1) */
> + uint16_t arm_boot_flags;
> + uint8_t minor_revision; /* FADT Minor Revision (ACPI 5.1) */
> + uint64_t Xfacs; /* 64-bit physical address of FACS */
> + uint64_t Xdsdt; /* 64-bit physical address of DSDT */
> + /* 64-bit Extended Power Mgt 1a Event Reg Blk address */
> + struct acpi_generic_address xpm1a_event_block;
> + /* 64-bit Extended Power Mgt 1b Event Reg Blk address */
> + struct acpi_generic_address xpm1b_event_block;
> + /* 64-bit Extended Power Mgt 1a Control Reg Blk address */
> + struct acpi_generic_address xpm1a_control_block;
> + /* 64-bit Extended Power Mgt 1b Control Reg Blk address */
> + struct acpi_generic_address xpm1b_control_block;
> + /* 64-bit Extended Power Mgt 2 Control Reg Blk address */
> + struct acpi_generic_address xpm2_control_block;
> + /* 64-bit Extended Power Mgt Timer Ctrl Reg Blk address */
> + struct acpi_generic_address xpm_timer_block;
> + /* 64-bit Extended General Purpose Event 0 Reg Blk address */
> + struct acpi_generic_address xgpe0_block;
> + /* 64-bit Extended General Purpose Event 1 Reg Blk address */
> + struct acpi_generic_address xgpe1_block;
> + /* 64-bit Sleep Control register (ACPI 5.0) */
> + struct acpi_generic_address sleep_control;
> + /* 64-bit Sleep Status register (ACPI 5.0) */
> + struct acpi_generic_address sleep_status;
> +};
> +
> +#endif /* _ACPI_DEFS_H_ */
> +
> +/*
> + * Local variables:
> + * mode: C
> + * c-file-style: "BSD"
> + * c-basic-offset: 4
> + * tab-width: 4
> + * indent-tabs-mode: nil
> + * End:
> + */
> --
> 2.0.4
>
>
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