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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [Xen-devel] [PATCH v2] xen/arm: gicv2: Export GICv2m register frames to domain0 by device tree
Hi Julien,
On 27 April 2016 at 17:40, Julien Grall <julien.grall@xxxxxxx> wrote:
>
>
> On 27/04/2016 07:05, Wei Chen wrote:
>>
>> Hi Julien,
>
>
> Hi Wei,
>
>> On 26 April 2016 at 18:49, Julien Grall <julien.grall@xxxxxxx> wrote:
>>>
>>> On 25/04/2016 10:39, Wei Chen wrote:
>>>>
>>>> + d->domain_id);
>>>> + return ret;
>>>> + }
>>>> +
>>>> + /*
>>>> + * Map all SPIs that are allocated to MSIs for the frame to the
>>>> + * domain.
>>>> + */
>>>> + for ( spi = v2m_data->spi_start;
>>>> + spi < (v2m_data->spi_start + v2m_data->nr_spis); spi++ )
>>>> + {
>>>> + /*
>>>> + * MSIs are always edge-triggered. Configure the associated
>>>> SPIs
>>>> + * to be edge-rising.
>>>
>>>
>>>
>>> How did you find that SPIs should be configured edge-rising?
>>
>> Before route_irq_to_guest, the SPI must be configured. I found Linux
>> v2m driver set
>> the SPI type to edge-rising, so I set edge-rising as v2m SPI default
>> type here too.
>
>
> Well, Linux did it for a good reason (i.e based on a spec). We are trying in
> Xen to document piece of code which may not be straight-forward to deduce.
>
> In this case, the IRQ is configured edge-rising because this is the only
> edge type supported by SPIs. I would expand the second sentence of the
> comment to explain that.
>
Thanks for your explanation. I have addressed your other comments in
the v3 patch.
So I will add the reason of configuring SPIs to edge-rising to v4 patch.
> Regards,
>
> --
> Julien Grall
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