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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [Xen-devel] [PATCH] x86/vMSI-X: fix qword write covering vector control field
Along with using the upper 32 bits of the written value, the address
also needs advancing, so that msix_write_completion() will use the
correct address for re-invocation of msixtbl_write().
Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx>
--- a/xen/arch/x86/hvm/vmsi.c
+++ b/xen/arch/x86/hvm/vmsi.c
@@ -295,6 +295,7 @@ static int msixtbl_write(struct vcpu *v,
if ( len != 8 || !index )
goto out;
val >>= 32;
+ address += 4;
}
/* Exit to device model when unmasking and address/data got modified. */
Attachment:
x86-vMSI-X-qword-mask-write.patch _______________________________________________ Xen-devel mailing list Xen-devel@xxxxxxxxxxxxx http://lists.xen.org/xen-devel
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