x86: use "unsigned int" for cache attribute values ... where suitable. But note that the type of "cacheattr" in get_page_from_l1e() specifically needs to remain "unsigned long". Signed-off-by: Jan Beulich --- a/xen/arch/x86/mm.c +++ b/xen/arch/x86/mm.c @@ -802,7 +802,7 @@ int is_iomem_page(unsigned long mfn) return (page_get_owner(page) == dom_io); } -static int update_xen_mappings(unsigned long mfn, unsigned long cacheattr) +static int update_xen_mappings(unsigned long mfn, unsigned int cacheattr) { int err = 0; bool_t alias = mfn >= PFN_DOWN(xen_phys_start) && @@ -2136,7 +2136,7 @@ static int mod_l4_entry(l4_pgentry_t *pl static int cleanup_page_cacheattr(struct page_info *page) { - uint32_t cacheattr = + unsigned int cacheattr = (page->count_info & PGC_cacheattr_mask) >> PGC_cacheattr_base; if ( likely(cacheattr == 0) ) --- a/xen/include/asm-x86/page.h +++ b/xen/include/asm-x86/page.h @@ -348,11 +348,11 @@ void free_xen_pagetable(void *v); l1_pgentry_t *virt_to_xen_l1e(unsigned long v); /* Convert between PAT/PCD/PWT embedded in PTE flags and 3-bit cacheattr. */ -static inline uint32_t pte_flags_to_cacheattr(uint32_t flags) +static inline unsigned int pte_flags_to_cacheattr(unsigned int flags) { return ((flags >> 5) & 4) | ((flags >> 3) & 3); } -static inline uint32_t cacheattr_to_pte_flags(uint32_t cacheattr) +static inline unsigned int cacheattr_to_pte_flags(unsigned int cacheattr) { return ((cacheattr & 4) << 5) | ((cacheattr & 3) << 3); }