Re: [Xen-devel] [PATCH v5 19/22] hvm/params: Add a new delivery type for event-channel in HVM_PARAM_CALLBACK_IRQ

["Jan Beulich" <JBeulich@xxxxxxxx>]

>>> On 04.03.16 at 07:15, <zhaoshenglong@xxxxxxxxxx> wrote:
> From: Shannon Zhao <shannon.zhao@xxxxxxxxxx>
> 
> Add a new delivery type:
> val[63:56] == 3: val[15:8] is flag: val[7:0] is a PPI.
> To the flag, bit 8 stands the interrupt mode is edge(1) or level(0) and
> bit 9 stands the interrupt polarity is active low(1) or high(0).
> 
> Cc: Jan Beulich <jbeulich@xxxxxxxx>
> Signed-off-by: Shannon Zhao <shannon.zhao@xxxxxxxxxx>

The set of Cc-s is too narrow - all REST maintainers should be copied.

> --- a/xen/include/public/hvm/params.h
> +++ b/xen/include/public/hvm/params.h
> @@ -55,6 +55,16 @@
>   * if this delivery method is available.
>   */
>  
> +#define HVM_PARAM_CALLBACK_TYPE_EVENT    3
> +/*
> + * val[55:16] need to be zero.
> + * val[15:8] is flag of event-channel interrupt:
> + *  bit 8: interrupt is edge(1) or level(0) triggered
> + *  bit 9: interrupt is active low(1) or high(0)
> + * val[7:0] is PPI number used by event-channel.
> + * This is only used by ARM/ARM64.
> + */

I think the name of the constant needs improvement. The low 8
bits make this extremely ARM specific, so perhaps
HVM_PARAM_CALLBACK_TYPE_PPI? Albeit - wouldn't the
vector and/or GSI ones be re-usable for this purpose? (I
don't know enough about ARM to be certain.)

And then I'm now also wondering about the description of bits
8 and 9 - event channels don't know of edge/level triggering
or high/low polarity, so it looks to me as if the comment is at
least misleading too.

Jan


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