[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [Xen-devel] [PATCH RFC 23/31] xen/x86: Export cpuid levelling capabilities via SYSCTL
>>> On 16.12.15 at 22:24, <andrew.cooper3@xxxxxxxxxx> wrote: > --- a/xen/arch/x86/cpu/common.c > +++ b/xen/arch/x86/cpu/common.c > @@ -32,6 +32,9 @@ integer_param("cpuid_mask_ext_ecx", opt_cpuid_mask_ext_ecx); > unsigned int __devinitdata opt_cpuid_mask_ext_edx = ~0u; > integer_param("cpuid_mask_ext_edx", opt_cpuid_mask_ext_edx); > > +unsigned int __initdata expected_levelling_cap; Unused variable. > +unsigned int __read_mostly levelling_caps; Never written to variable. > +/* > + * XEN_SYSCTL_get_levelling_caps (x86 specific) > + * > + * Return hardware capabilities concerning masking or faulting of the cpuid > + * instruction for PV guests. > + */ > +struct xen_sysctl_levelling_caps { > +/* > + * Featureset array index encoding: > + * - (possibly) 'e' Extended > + * - leaf, uppercase hex > + * - register, lowercase > + * - (possibly) subleaf > + */ > +#define XEN_SYSCTL_LEVELCAP_faulting (1ul << 0) /* CPUID faulting */ > +#define XEN_SYSCTL_LEVELCAP_1c (1ul << 1) /* 0x00000001.ecx */ > +#define XEN_SYSCTL_LEVELCAP_1d (1ul << 2) /* 0x00000001.edx */ > +#define XEN_SYSCTL_LEVELCAP_e1c (1ul << 3) /* 0x80000001.ecx */ > +#define XEN_SYSCTL_LEVELCAP_e1d (1ul << 4) /* 0x80000001.edx */ > +#define XEN_SYSCTL_LEVELCAP_Da1 (1ul << 5) /* 0x0000000D:1.eax */ > +#define XEN_SYSCTL_LEVELCAP_6c (1ul << 6) /* 0x00000006.ecx */ > +#define XEN_SYSCTL_LEVELCAP_7a0 (1ul << 7) /* 0x00000007:0.eax */ > +#define XEN_SYSCTL_LEVELCAP_7b0 (1ul << 8) /* 0x00000007:0.ebx */ Similar comment apply to the naming here as I had given for the feature sysctl. Jan _______________________________________________ Xen-devel mailing list Xen-devel@xxxxxxxxxxxxx http://lists.xen.org/xen-devel
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