[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [Xen-devel] [PATCH v2 0/2] Be more strict about writing to Intel VPMU registers
* Add more checks when writing VPMU control registers * Explicitly disable PEBS since calculating reserved bits in MSR_IA32_PEBS_ENABLE is somewhat non-trivial (and pointless since PEBS is not supported) Boris Ostrovsky (2): x86/VPMU: Check more carefully which bits are allowed to be written to MSRs x86/VPMU: Don't allow any non-zero writes to MSR_IA32_PEBS_ENABLE xen/arch/x86/cpu/vpmu_intel.c | 31 ++++++++++++++++++++++--------- 1 files changed, 22 insertions(+), 9 deletions(-) _______________________________________________ Xen-devel mailing list Xen-devel@xxxxxxxxxxxxx http://lists.xen.org/xen-devel
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