[Xen-devel] [RFC 10/10] xen/arm: Factorize the C code to dispatch HVC

[Julien Grall <julien.grall@xxxxxxxxxx>]

Now that Xen hypercall is fully dispatched in assembly, the code to
handle HVC32/HVC64 is mostly the same.

Create an helper to avoid duplicating the code.

Signed-off-by: Julien Grall <julien.grall@xxxxxxxxxx>
---
 xen/arch/arm/traps.c | 36 ++++++++++++++++--------------------
 1 file changed, 16 insertions(+), 20 deletions(-)

diff --git a/xen/arch/arm/traps.c b/xen/arch/arm/traps.c
index 3cd8992..a49530a 100644
--- a/xen/arch/arm/traps.c
+++ b/xen/arch/arm/traps.c
@@ -1335,6 +1335,20 @@ static void do_trap_psci(struct cpu_user_regs *regs)
     }
 }
 
+static void do_trap_hvc(struct cpu_user_regs *regs, uint32_t iss)
+{
+
+#ifndef NDEBUG
+    if ( (iss & 0xff00) == 0xff00 )
+        return do_debug_trap(regs, iss & 0x00ff);
+#endif
+    if ( iss == 0 )
+        return do_trap_psci(regs);
+
+    /* The ISS is not supported */
+    domain_crash_synchronous();
+}
+
 static bool_t check_multicall_32bit_clean(struct multicall_entry *multi)
 {
     int i;
@@ -2406,31 +2420,13 @@ asmlinkage void do_trap_hypervisor(struct cpu_user_regs 
*regs)
     case HSR_EC_HVC32:
         GUEST_BUG_ON(!psr_mode_is_32bit(regs->cpsr));
         perfc_incr(trap_hvc32);
-#ifndef NDEBUG
-        if ( (hsr.iss & 0xff00) == 0xff00 )
-            return do_debug_trap(regs, hsr.iss & 0x00ff);
-#endif
-        if ( hsr.iss == 0 )
-            return do_trap_psci(regs);
-
-        /* The ISS is not supported */
-        domain_crash_synchronous();
-
+        do_trap_hvc(regs, hsr.iss);
         break;
 #ifdef CONFIG_ARM_64
     case HSR_EC_HVC64:
         GUEST_BUG_ON(psr_mode_is_32bit(regs->cpsr));
         perfc_incr(trap_hvc64);
-#ifndef NDEBUG
-        if ( (hsr.iss & 0xff00) == 0xff00 )
-            return do_debug_trap(regs, hsr.iss & 0x00ff);
-#endif
-        if ( hsr.iss == 0 )
-            return do_trap_psci(regs);
-
-        /* The ISS is not supported */
-        domain_crash_synchronous();
-
+        do_trap_hvc(regs, hsr.iss);
         break;
     case HSR_EC_SMC64:
         /*
-- 
2.1.4


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