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Re: [Xen-devel] [PATCH RFC v2 4/4] xen/MSI: re-expose masking capability



On Tue, 24 Nov 2015, Jan Beulich wrote:
> Now that the hypervisor intercepts all config space writes and monitors
> changes to the masking flags, this undoes the main effect of the
> XSA-129 fix, exposing the masking capability again to guests.
> 
> Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx>
> ---
> TBD: We probably need to deal with running on an older hypervisor. I
>      can't, however, immediately see a way for qemu to find out.

Actually QEMU has already an infrastructure to detect the hypervisor
version at compile time, see include/hw/xen/xen_common.h. You could
#define the right emu_mask depending on the hypervisor.


> --- a/hw/xen/xen_pt_config_init.c
> +++ b/hw/xen/xen_pt_config_init.c
> @@ -1333,7 +1333,7 @@ static XenPTRegInfo xen_pt_emu_reg_msi[]
>          .init_val   = 0x0000,
>          .res_mask   = 0xFE00,
>          .ro_mask    = 0x018E,
> -        .emu_mask   = 0x017E,
> +        .emu_mask   = 0x007E,
>          .init       = xen_pt_msgctrl_reg_init,
>          .u.w.read   = xen_pt_word_reg_read,
>          .u.w.write  = xen_pt_msgctrl_reg_write,
> @@ -1387,8 +1387,8 @@ static XenPTRegInfo xen_pt_emu_reg_msi[]
>          .offset     = PCI_MSI_MASK_32,
>          .size       = 4,
>          .init_val   = 0x00000000,
> -        .ro_mask    = 0xFFFFFFFF,
> -        .emu_mask   = 0xFFFFFFFF,
> +        .ro_mask    = 0x00000000,
> +        .emu_mask   = 0x00000000,
>          .init       = xen_pt_mask_reg_init,
>          .u.dw.read  = xen_pt_long_reg_read,
>          .u.dw.write = xen_pt_long_reg_write,
> @@ -1398,8 +1398,8 @@ static XenPTRegInfo xen_pt_emu_reg_msi[]
>          .offset     = PCI_MSI_MASK_64,
>          .size       = 4,
>          .init_val   = 0x00000000,
> -        .ro_mask    = 0xFFFFFFFF,
> -        .emu_mask   = 0xFFFFFFFF,
> +        .ro_mask    = 0x00000000,
> +        .emu_mask   = 0x00000000,
>          .init       = xen_pt_mask_reg_init,
>          .u.dw.read  = xen_pt_long_reg_read,
>          .u.dw.write = xen_pt_long_reg_write,
> 
> 
> 
> 

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