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Re: [Xen-devel] [PATCH] iommu/quirk: disable shared EPT for Sandybridge and earlier processors.



>>> On 25.11.15 at 16:58, <malcolm.crossley@xxxxxxxxxx> wrote:
> On 25/11/15 15:38, Jan Beulich wrote:
>>>>> On 25.11.15 at 16:13, <andrew.cooper3@xxxxxxxxxx> wrote:
>>> On 25/11/15 10:49, Jan Beulich wrote:
>>>> And finally I'm not fully convinced using CPU model info to deduce
>>>> chipset behavior is entirely correct (albeit perhaps in practice it'll
>>>> be fine except maybe when running Xen itself virtualized).
>>>
>>> What else would you suggest? I can't think of any better identifying
>>> information.
>> 
>> Chipset IDs / revisions?
> 
> In this case the IOMMU is integrated into the Sandybridge-EP processor 
> itself.

Which doesn't preclude it to be identified via PCI device ID - after all
there are dozens of processor integrated PCI devices. Looking at
one of my systems,

00:05.0 System peripheral [0880]: Intel Corporation Sandy Bridge Address Map, 
VTd_Misc, System Management [8086:3c28] (rev 07)
80:05.0 System peripheral [0880]: Intel Corporation Sandy Bridge Address Map, 
VTd_Misc, System Management [8086:3c28] (rev 07)

could be a candidate (we already key a quirk on this device in
pci_vtd_quirk()).

Jan


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