x86: don't use FPU instructions when there is no FPU

One of the many things we need to do if we want to eventually be able
to run on e.g. Xeon Phi.

Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx>

--- a/xen/arch/x86/cpu/common.c
+++ b/xen/arch/x86/cpu/common.c
@@ -261,6 +261,9 @@ static void __cpuinit generic_identify(s
 		cpuid_count(0x00000007, 0, &dummy, &ebx, &dummy, &dummy);
 		c->x86_capability[X86_FEATURE_FSGSBASE / 32] = ebx;
 	}
+
+	if ( !cpu_has_fpu )
+		__set_bit(X86_FEATURE_NO_FPU_SEL, c->x86_capability);
 }
 
 /*
--- a/xen/arch/x86/i387.c
+++ b/xen/arch/x86/i387.c
@@ -21,7 +21,8 @@ static void fpu_init(void)
 {
     uint32_t val = MXCSR_DEFAULT;
     
-    asm volatile ( "fninit" );
+    if ( cpu_has_fpu || cpu_has_mmx )
+        asm volatile ( "fninit" );
 
     /* load default value into MXCSR control/status register */
     asm volatile ( "ldmxcsr %0" : : "m" (val) );
@@ -59,7 +60,7 @@ static inline void fpu_fxrstor(struct vc
      * sometimes new user value. Both should be ok. Use the FPU saved
      * data block as a safe address because it should be in L1.
      */
-    if ( !(fpu_ctxt->fsw & 0x0080) &&
+    if ( cpu_has_fpu && !(fpu_ctxt->fsw & 0x0080) &&
          boot_cpu_data.x86_vendor == X86_VENDOR_AMD )
     {
         asm volatile ( "fnclex\n\t"
--- a/xen/include/asm-x86/cpufeature.h
+++ b/xen/include/asm-x86/cpufeature.h
@@ -170,6 +170,7 @@
 #define CPUID5_ECX_EXTENSIONS_SUPPORTED 0x1
 #define CPUID5_ECX_INTERRUPT_BREAK      0x2
 
+#define cpu_has_fpu		boot_cpu_has(X86_FEATURE_FPU)
 #define cpu_has_de		1
 #define cpu_has_pse		1
 #define cpu_has_pge		1
@@ -177,7 +178,7 @@
 #define cpu_has_apic		boot_cpu_has(X86_FEATURE_APIC)
 #define cpu_has_sep		boot_cpu_has(X86_FEATURE_SEP)
 #define cpu_has_mtrr		1
-#define cpu_has_mmx		1
+#define cpu_has_mmx		boot_cpu_has(X86_FEATURE_MMX)
 #define cpu_has_xmm3		boot_cpu_has(X86_FEATURE_XMM3)
 #define cpu_has_ht		boot_cpu_has(X86_FEATURE_HT)
 #define cpu_has_mp		1