Re: [Xen-devel] [PATCH v3] x86/EPT: work around hardware erratum setting A bit

[Wei Liu <wei.liu2@xxxxxxxxxx>]

On Wed, Sep 30, 2015 at 05:36:22AM -0600, Jan Beulich wrote:
> Since commit 191b3f3344ee ("p2m/ept: enable PML in p2m-ept for
> log-dirty"), the A and D bits of EPT paging entries are set
> unconditionally, regardless of whether PML is enabled or not. This
> causes a regression in Xen 4.6 on some processors due to Intel Errata
> AVR41 -- HVM guests get severe memory corruption when the A bit is set
> due to incorrect TLB flushing on mov to cr3. The errata affects the Atom
> C2000 family (Avoton).
> 
> To fix, do not set the A bit on this processor family.
> 
> Signed-off-by: Ross Lagerwall <ross.lagerwall@xxxxxxxxxx>
> 
> Move feature suppression to feature detection code. Add command line
> override.
> 
> Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx>
> 

Release-acked-by: Wei Liu <wei.liu2@xxxxxxxxxx>

Thanks for handling this issue!

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