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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [Xen-devel] [PATCH v3] x86/EPT: work around hardware erratum setting A bit
On 30/09/15 12:36, Jan Beulich wrote:
> Since commit 191b3f3344ee ("p2m/ept: enable PML in p2m-ept for
> log-dirty"), the A and D bits of EPT paging entries are set
> unconditionally, regardless of whether PML is enabled or not. This
> causes a regression in Xen 4.6 on some processors due to Intel Errata
> AVR41 -- HVM guests get severe memory corruption when the A bit is set
> due to incorrect TLB flushing on mov to cr3. The errata affects the Atom
> C2000 family (Avoton).
>
> To fix, do not set the A bit on this processor family.
>
> Signed-off-by: Ross Lagerwall <ross.lagerwall@xxxxxxxxxx>
>
> Move feature suppression to feature detection code. Add command line
> override.
>
> Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx>
>
> --- a/docs/misc/xen-command-line.markdown
> +++ b/docs/misc/xen-command-line.markdown
> @@ -705,19 +705,28 @@ virtualization, to allow the L1 hypervis
> does not provide VM\_ENTRY\_LOAD\_GUEST\_PAT.
>
> ### ept (Intel)
> -> `= List of ( pml<boolean> )`
> +> `= List of ( pml | ad )`
Please keep the type annotations. Future sub-options might not be
boolean parameters.
Otherwise, Reviewed-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
The setup of vmx features looks ripe for some future cleanup, allowing
quite a few bits of data to move from __read_mostly into __initdata.
However, the patch does match the prevailing style so should be fixed in
this way, given the proximity to the 4.6 release.
~Andrew
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