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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [Xen-devel] [PATCH 7/8] xen/arm: gic-v2: Detect automatically aliased GIC400
On Tue, 2015-09-22 at 18:47 +0100, Julien Grall wrote:
Subject: "automatically detect..."
> We are currently using a per-platform quirk to know if the 2 4KB region of
> the GIC CPU interface are each aligned to 64KB. Although, it may be
> possible to have different layout on a same platform (depending on the
> firmware version).
>
> Rather than having a quirk it's possible to detect by reading the GIC
> memory. This patch is based from the Linux commit "irqchip/GIC: Add
> workaround
> for aliased GIC400" [1].
>
> Take the opportunity to clean up the GICv2 of code which was only
> required because of the quirk.
>
> Note that none of the platform using the gic-hip04 where actually using
s/where/were/
> @@ -688,7 +684,8 @@ static int __init hip04gic_init(void)
> if ( !gicv2.map_hbase )
> panic("GIC-HIP04: Failed to ioremap for GIC Virtual
> interface\n");
>
> - vgic_v2_setup_hw(dbase, cbase, vbase);
> + /* XXX: Support aliased HIP04 GIC? */
I assume it doesn't need this, so lets drop the comment and assume that's
the lack of the quirk on this platform is correct.
> + gicv2.map_cbase = ioremap_nocache(cbase, csize);
> + if ( !gicv2.map_cbase )
> panic("GICv2: Failed to ioremap for GIC CPU interface\n");
s/for/the/ or just s/for //.
>
> + if ( gicv2_is_aliased(cbase, csize) )
> + {
> + /*
> + * Move the base up by 60kB, so that we have a 8kB contiguous
> + * region, which allows us to use GICC_DIR at its
> + * normal offset.
> + * Note the variable cbase is not updated has we need the original
s/has/as/
> printk("GICv3 compatible with GICv2 cbase %#"PRIpaddr" vbase
> %#"PRIpaddr"\n",
> cbase, vbase);
>
> - vgic_v2_setup_hw(dbase, cbase, vbase);
> + /* XXX: Support aliased GICv2 on GICv3? */
Nah.
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