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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [Xen-devel] [PATCH v5 2/5] x86/pvh: Do not allow 32-bit PVH guests to clear CR4's PAE bit
.. since we only support 32-bit PV(H) guests in PAE mode.
Signed-off-by: Boris Ostrovsky <boris.ostrovsky@xxxxxxxxxx>
---
xen/arch/x86/hvm/hvm.c | 16 ++++++++++++----
1 file changed, 12 insertions(+), 4 deletions(-)
diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c
index 90ba676..6f6cadc 100644
--- a/xen/arch/x86/hvm/hvm.c
+++ b/xen/arch/x86/hvm/hvm.c
@@ -3524,11 +3524,19 @@ int hvm_set_cr4(unsigned long value, bool_t may_defer)
goto gpf;
}
- if ( !(value & X86_CR4_PAE) && hvm_long_mode_enabled(v) )
+ if ( !(value & X86_CR4_PAE) )
{
- HVM_DBG_LOG(DBG_LEVEL_1, "Guest cleared CR4.PAE while "
- "EFER.LMA is set");
- goto gpf;
+ if ( hvm_long_mode_enabled(v) )
+ {
+ HVM_DBG_LOG(DBG_LEVEL_1, "Guest cleared CR4.PAE while "
+ "EFER.LMA is set");
+ goto gpf;
+ }
+ if ( is_pvh_vcpu(v) )
+ {
+ HVM_DBG_LOG(DBG_LEVEL_1, "32-bit PVH guest cleared CR4.PAE");
+ goto gpf;
+ }
}
old_cr = v->arch.hvm_vcpu.guest_cr[4];
--
1.8.1.4
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