[Xen-devel] [PATCH v5 0/7] x86/MSI: XSA-120, 126, 128-131 follow-up

["Jan Beulich" <JBeulich@xxxxxxxx>]

RFCs dropped (with some debugging code removed). Everything
except for patch 7 has been submitted before. 

1: PCI: add config space write abstract intercept logic
2: MSI-X: track host and guest mask-all requests separately
3: MSI-X: be more careful during teardown
4: MSI-X: access MSI-X table only after having enabled MSI-X
5: MSI-X: reduce fiddling with control register during restore
6: MSI: properly track guest masking requests
7: PCI: intercept all PV Dom0 MMCFG writes

The remaining missing piece (PVH Dom0 support) is not being
considered important to be dealt with before this can go in (as
there are more issues in that area anyway). Hooking up
pci_conf_write_intercept() to the nested page fault handler
shouldn't be very difficult to implement as long as MMIO MFNs
get mapped 1:1 in PVH Dom0's P2M. Enforcing the transition
of the respective pages to r/o could probably be done by
(ab)using p2m_memory_type_changed().

Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx>



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