Re: [Xen-devel] [PATCH v3 10/10] x86/MSI-X: provide hypercall interface for mask-all control

[Roger Pau Monné <roger.pau@xxxxxxxxxx>]

El 19/06/15 a les 16.58, Jan Beulich ha escrit:
>>>> On 19.06.15 at 16:07, <roger.pau@xxxxxxxxxx> wrote:
>> I don't mind adding a PHYSDEVOP_pci_mmcfg_reserved call to FreeBSD, but
>> for it to have any effect we need to stop unconditionally mapping
>> everything as MMIO regions on PVH Dom0.
> 
> Right, I didn't mean to imply PVH would have any chance of working
> right now.
> 
> But what you didn't respond to is the (kind of implicit I admit) question
> of whether FreeBSD is using MMCFG accesses for the low 256 bytes
> of the config space. (I note that there's one special case in Linux -
> NumaChip - whether this is the case.)

OK, I didn't get the part of the question. AFAICT yes, FreeBSD will 
access the low 256 bytes of the config space. For example the stub to 
write to a cfg register is as follows:

void
pci_cfgregwrite(int bus, int slot, int func, int reg, u_int32_t data, int bytes)
{

        if (cfgmech == CFGMECH_PCIE &&
            (bus >= pcie_minbus && bus <= pcie_maxbus) &&
            (bus != 0 || !(1 << slot & pcie_badslots)))
                pciereg_cfgwrite(bus, slot, func, reg, data, bytes);
        else
                pcireg_cfgwrite(bus, slot, func, reg, data, bytes);
}

I take that you would prefer it to be:

void
pci_cfgregwrite(int bus, int slot, int func, int reg, u_int32_t data, int bytes)
{

        if (cfgmech == CFGMECH_PCIE &&
            (bus >= pcie_minbus && bus <= pcie_maxbus) &&
            (bus != 0 || !(1 << slot & pcie_badslots)) &&
            (reg > PCI_REGMAX))
                pciereg_cfgwrite(bus, slot, func, reg, data, bytes);
        else
                pcireg_cfgwrite(bus, slot, func, reg, data, bytes);
}

Where 'PCI_REGMAX' is 255.

Roger.


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