[Xen-devel] [PATCH v2 3/3] xen/iommu: arm: Use p2m_pfn_bits as stage2 input size

["Edgar E. Iglesias" <edgar.iglesias@xxxxxxxxx>]

From: "Edgar E. Iglesias" <edgar.iglesias@xxxxxxxxxx>

The Stage2 input-size must match what the CPU uses because
the SMMU and the CPU share page-tables.

Assert that the SMMU supports the given pfn bit size is
supported by the SMMU and use it.

Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xxxxxxxxxx>
---
 xen/drivers/passthrough/arm/smmu.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/xen/drivers/passthrough/arm/smmu.c 
b/xen/drivers/passthrough/arm/smmu.c
index 8a9b58b..af1e39f 100644
--- a/xen/drivers/passthrough/arm/smmu.c
+++ b/xen/drivers/passthrough/arm/smmu.c
@@ -2230,8 +2230,9 @@ static int arm_smmu_device_cfg_probe(struct 
arm_smmu_device *smmu)
        size = arm_smmu_id_size_to_bits((id >> ID2_IAS_SHIFT) & ID2_IAS_MASK);
        smmu->s1_output_size = min_t(unsigned long, PHYS_MASK_SHIFT, size);
 
-       /* Xen: Stage-2 input size is not restricted */
-       smmu->s2_input_size = size;
+       /* Xen: Stage-2 input size has to match p2m_pfn_bits.  */
+       ASSERT(size >= p2m_pfn_bits);
+       smmu->s2_input_size = p2m_pfn_bits;
 #if 0
        /* Stage-2 input size limited due to pgd allocation (PTRS_PER_PGD) */
 #ifdef CONFIG_64BIT
-- 
1.9.1


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