Re: [Xen-devel] Commit 1aeb1156fa43fe2cd2b5003995b20466cd19a622: "x86 don't change affinity with interrupt unmasked", APCI errors and assorted pci trouble

[Sander Eikelenboom <linux@xxxxxxxxxxxxxx>]

Friday, April 17, 2015, 1:43:32 PM, you wrote:

>>>> On 14.04.15 at 14:46, <linux@xxxxxxxxxxxxxx> wrote:
>> I just had a hunch .. could it be related to the kernel apci/irq refactoring
>> series of Jiang Liu, that already caused a lot of trouble in 3.17, 3.18 and 
>> 3.19
>> with Xen.  And yes that seems to be the case:
>> 
>> On Xen without "x86 don't change affinity with interrupt unmasked"
>> - 3.16 && 3.19 && 4.0 all work fine 
>> 
>> On Xen with "x86 don't change affinity with interrupt unmasked" 
>> - 3.16 (which is before that kernel refactoring series) works fine.
>> - 3.19, 4.0 both give the dom0 kernel hangs and the :
>>         (XEN) [2015-03-26 20:35:42.205] APIC error on CPU0: 00(40)
>>         (XEN) [2015-03-26 20:35:42.372] APIC error on CPU0: 40(40)
>> 
>> (haven't tested 3.17 and 3.18 because these have asorted problems due that 
>>  series that weren't fixed in time before stable updates ended.)
>> 
>> So it seems Jan's patch seems to interfere with that patch series.

> That's rather odd a finding - the patch in question in fact uncovered
> a bug introduced in 2ca9fbd739 ("AMD IOMMU: allocate IRTE entries
> instead of using a static mapping") in that IO-APIC RTE reads would
> unconditionally translate the data (i.e. regardless of whether the
> entry was already in translated format). The patch below fixes this
> for me - can you please give this a try too?

> Thanks, Jan

Hi Jan,

For me as well, thanks again !

--
Sander


> --- unstable.orig/xen/drivers/passthrough/amd/iommu_intr.c
> +++ unstable/xen/drivers/passthrough/amd/iommu_intr.c
> @@ -365,15 +365,17 @@ unsigned int amd_iommu_read_ioapic_from_
>      unsigned int apic, unsigned int reg)
>  {
>      unsigned int val = __io_apic_read(apic, reg);
> +    unsigned int pin = (reg - 0x10) / 2;
> +    unsigned int offset = ioapic_sbdf[IO_APIC_ID(apic)].pin_2_idx[pin];
>  
> -    if ( !(reg & 1) )
> +    if ( !(reg & 1) && offset < INTREMAP_ENTRIES )
>      {
> -        unsigned int offset = val & (INTREMAP_ENTRIES - 1);
>          u16 bdf = ioapic_sbdf[IO_APIC_ID(apic)].bdf;
>          u16 seg = ioapic_sbdf[IO_APIC_ID(apic)].seg;
>          u16 req_id = get_intremap_requestor_id(seg, bdf);
>          const u32 *entry = get_intremap_entry(seg, req_id, offset);
>  
> +        ASSERT(offset == (val & (INTREMAP_ENTRIES - 1)));
>          val &= ~(INTREMAP_ENTRIES - 1);
>          val |= get_field_from_reg_u32(*entry,
>                                        INT_REMAP_ENTRY_INTTYPE_MASK,





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