Re: [Xen-devel] [PATCH 10/10] p2m/ept: Enable PML in p2m-ept for log-dirty.

[Tim Deegan <tim@xxxxxxx>]

At 10:35 +0800 on 27 Mar (1427452554), Kai Huang wrote:
> @@ -118,6 +119,12 @@ static void ept_p2m_type_to_flags(ept_entry_t *entry, 
> p2m_type_t type, p2m_acces
>              break;
>          case p2m_ram_rw:
>              entry->r = entry->w = entry->x = 1;
> +            /*
> +             * This is about to avoid unnecessary GPA logging in PML buffer,
> +             * such as normal memory in partial log-dirty
> +             */
> +            if ( vmx_domain_pml_enabled(p2m->domain) )
> +                entry->d = 1;

I think that both A and D should be set here, even when PML is not
supported, to avoid the MMU having to write them later.  And indeed
not just for ram_rw, but for every present leaf type.

You will still need to check whether the CPU supports the A/D bits,
since AIUI those are reserved bits otherwise.

>              break;
>          case p2m_mmio_direct:
>              entry->r = entry->x = 1;
> @@ -125,6 +132,26 @@ static void ept_p2m_type_to_flags(ept_entry_t *entry, 
> p2m_type_t type, p2m_acces
>                                                      entry->mfn);
>              break;
>          case p2m_ram_logdirty:
> +            entry->r = entry->x = 1;
> +            if ( vmx_domain_pml_enabled(p2m->domain) )
> +            {
> +                /*
> +                 * In case of PML, we don't have to write protect 4K page, 
> but
> +                 * only need to clear D-bit for it. Note we still need to 
> write
> +                 * protect super page in order to split it to 4K pages in EPT
> +                 * violation.
> +                 */
> +                if ( !is_epte_superpage(entry) )
> +                {
> +                    entry->w = 1;
> +                    entry->d = 0;
> +                }
> +                else
> +                    entry->w = 0;
> +            }
> +            else
> +                entry->w = 0;
> +            break;

This can be folded into a neater form:

            if ( vmx_domain_pml_enabled(p2m->domain)
                 && !is_epte_superpage(entry) )
            {
                /*
                 * In case of PML, we don't have to write protect 4K page, but
                 * only need to clear D-bit for it. Note we still need to write
                 * protect super page in order to split it to 4K pages in EPT
                 * violation.
                 */
                entry->w = 1;
                entry->d = 0;
            }
            else
                entry->w = 0;

Cheers,

Tim.

_______________________________________________
Xen-devel mailing list
Xen-devel@xxxxxxxxxxxxx
http://lists.xen.org/xen-devel