Re: [Xen-devel] [PATCH v1 0/2] Add support for Xilinx ZynqMP SoC

[Ian Campbell <ian.campbell@xxxxxxxxxx>]

On Fri, 2015-03-06 at 11:31 +1000, Edgar E. Iglesias wrote:
> On Thu, Mar 05, 2015 at 04:50:15PM +0000, Ian Campbell wrote:
> > On Thu, 2015-03-05 at 18:27 +1000, Edgar E. Iglesias wrote:
> > > From: "Edgar E. Iglesias" <edgar.iglesias@xxxxxxxxxx>
> > > 
> > > Adds support for the Cadence UART in Xilinx ZynqMP. The
> > > rest of the ZynqMP platform is discovered via device-tree.
> > 
> > Is it fully discovered and working out of the box? That would be ....
> > awesome!
> 
> Yes it would be awesome if we can keep it like that :-)

I suppose you are seeing the "WARNING: Unrecognized/unsupported device
tree compatible list" message?

I wonder if we should either remove or tone down that warning, now that
we have a platform which genuinely doesn't require any platform specific
code. I think we probably want to say something so in bug reports we
know what is happening, maybe just something like "Platform: Generic
System".

> It's possible that we will need to add platform code in the future
> as we test out more features. In particular we'll likely need to do
> something around power/clock management.

Yes, this is something of an open problem for us, and one which I'm
unsure how to solve without some platform specific code in each case.

Most power/clock management should be deferred to the h/w domain which
is managing the I/O peripherals (likely dom0) but we need some way to
filter its activities to keep e.g. the CPU and UART (or in reality any
h/w block Xen itself is using, which isn't many fortunately) clocks on.

http://bugs.xenproject.org/xen/bug/45 is a related bug.

> > Do you have any links to any more information about this platform (I'm
> > just curious).
> 
> This one is a good starting point with follow-up links:
> http://www.xilinx.com/products/technology/ultrascale-mpsoc.html
> 
> The short version is that the ZynqMP is a chip including both a hard SoC part
> (PS, Programmable System) and a "soft" Programmable Logic (PL) FPGA part.
> In terms of Virtualization, the hard PS part has quad Cortex-A53s with
> EL2 enabled and an SMMU to allow secure device-passthrough of DMA capable 
> devices.

That sounds like a pretty sweet platform, thanks!

> For early access there are two platforms available, an FPGA based
> emulation platform (EP108) and a modified version of QEMU. XEN can run
> on both those platforms.
> 
> 
> > Also, if you could find the time to add a wikipage as a child of
> > http://wiki.xenproject.org/wiki/Xen_ARM_with_Virtualization_Extensions
> > (like for the other platforms) and add it to the h/w table on the main
> > page that would be great.
> > 
> > The wiki is locked down because of spammers, once you've created an
> > account either drop me a line or fill in the form
> > http://xenproject.org/component/content/article/100-misc/145-request-to-be-made-a-wiki-editor.html
> >  and someone will enable write access for you.
> 
> Yes, I'm happy to update the wiki. I've created a user (edgar_igl) and filled 
> out the form.

I've just seen the form entry and added the write bit to "edgar_igl".
Thanks!

Ian.


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