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Re: [Xen-devel] [PATCH] have architectures specify the number of PIRQs a hardware domain gets



>>> On 11.12.14 at 13:07, <Ian.Campbell@xxxxxxxxxx> wrote:
> On Fri, 2014-12-05 at 14:51 +0000, Ian Campbell wrote:
>> On Fri, 2014-12-05 at 14:48 +0000, Jan Beulich wrote:
>> > >>> On 05.12.14 at 15:27, <Ian.Campbell@xxxxxxxxxxxxx> wrote:
>> > > On Fri, 2014-12-05 at 13:51 +0000, Jan Beulich wrote:
>> > >>  #define nr_static_irqs NR_IRQS
>> > >> +#define arch_hwdom_irqs(domid) NR_IRQS
>> > > 
>> > > FWIW gic_number_lines() is the ARM equivalent of getting the number of
>> > > GSIs.
>> > > 
>> > > *BUT* we don't actually use pirqs on ARM (everything goes via the
>> > > virtualised interrupt controller). So maybe we should be setting
>> > > nr_pirqs to 0 on ARM. I appreciate you likely want such a patch to come
>> > > from an ARM person, so I'm fine with you making this NR_IRQS in the
>> > > meantime.
>> > 
>> > Considering Julien also asking for this, I don't mind changing this to
>> > zero for ARM. Just let me know which way I can get this ack-ed.
>> 
>> If you are happy to provide a version using zero and Julien wants to
>> provide a tested-by then I'm fine with going that way.
> 
> Seems like things were more complex than Julien expected here, so I
> think changing to zero would be a mistake at this point.
> 
> AIUI this patch results in no functional change for ARM, in that dom0
> previously saw:
>         d->nr_pirqs = nr_static_irqs + extra_dom0_irqs;
> where nr_static_irqs == NR_IRQS on ARM where now it sees:
> 
> When extra_dom0_irqs > 0
>         nr_static_irqs + extra_dom0_irqs
> which is the same as before. Or when extra_dom0_irqs:
>         arch_hwdom_irqs(domid);
> ==   NR_IRQS
> ==   nr_static_irqs + 0
> i.e. no change.
> 
> Oh, actually extra_dom0_irqs has changed from a default of 256 to 0, I
> don't think NR_IRQS(1024) + 256 made much sense on ARM (which is limited
> to 1020 IRQs in h/w anyway), so I don't consider that a problem.
> 
> If that's all correct then: 

It is.

>         Acked-by: Ian Campbell <ian.campbell@xxxxxxxxxx>
> 
> Also Ack with my REST maintainer hat on for the general principal/common
> code.

Thanks!

Jan


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