|
[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [Xen-devel] [PATCH v17 08/10] x86: add CMT related MSRs in allowed list
Tool stack will try to access the two MSRs to perform CMT
related operations, thus added them in the allowed list.
Signed-off-by: Dongxiao Xu <dongxiao.xu@xxxxxxxxx>
Signed-off-by: Chao Peng <chao.p.peng@xxxxxxxxxxxxxxx>
---
xen/arch/x86/platform_hypercall.c | 8 ++++++++
xen/include/asm-x86/msr-index.h | 2 ++
2 files changed, 10 insertions(+)
diff --git a/xen/arch/x86/platform_hypercall.c
b/xen/arch/x86/platform_hypercall.c
index 4b92b56..c049499 100644
--- a/xen/arch/x86/platform_hypercall.c
+++ b/xen/arch/x86/platform_hypercall.c
@@ -69,6 +69,14 @@ struct xen_resource_access {
static bool_t allow_access_msr(unsigned int msr)
{
+ switch ( msr )
+ {
+ /* MSR for CMT, refer to chapter 17.14 of Intel SDM. */
+ case MSR_IA32_QOSEVTSEL:
+ case MSR_IA32_QMC:
+ return 1;
+ }
+
return 0;
}
diff --git a/xen/include/asm-x86/msr-index.h b/xen/include/asm-x86/msr-index.h
index dcb2b87..ae089fb 100644
--- a/xen/include/asm-x86/msr-index.h
+++ b/xen/include/asm-x86/msr-index.h
@@ -324,6 +324,8 @@
#define MSR_IA32_ENERGY_PERF_BIAS 0x000001b0
/* Platform Shared Resource MSRs */
+#define MSR_IA32_QOSEVTSEL 0x00000c8d
+#define MSR_IA32_QMC 0x00000c8e
#define MSR_IA32_PQR_ASSOC 0x00000c8f
/* Intel Model 6 */
--
1.7.9.5
_______________________________________________
Xen-devel mailing list
Xen-devel@xxxxxxxxxxxxx
http://lists.xen.org/xen-devel
|
![]() |
Lists.xenproject.org is hosted with RackSpace, monitoring our |