Re: [Xen-devel] [PATCH for-4.5 v6 14/17] xen/arm: Instruction prefetch abort (X) mem_event handling

[Tamas K Lengyel <tamas.lengyel@xxxxxxxxxxxx>]

> +#ifdef CONFIG_ARM_32
> +    gva = READ_CP32(HIFAR);
> +#else
> +    gva = READ_SYSREG64(FAR_EL2);
> +#endif

You can just use READ_SYSREG(FAR_EL2) here and it will do the right
thing without the ifdef.
[...]
> +    addr = READ_SYSREG(FAR_EL2);

Like you do here ;-)

Ack.

 

> index b844f1d..044de12 100644
> --- a/xen/include/asm-arm/processor.h
> +++ b/xen/include/asm-arm/processor.h
> @@ -292,6 +292,36 @@ enum dabt_dfsc {
>      DABT_DFSC_TLB_CONFLICT      = 0b110000,
>  };
>
> +/* Instruction abort instruction fault status codes */
> +enum iabt_ifsc {
> +    IABT_IFSC_ADDR_SIZE_0       = 0b000000,

Apart from the related comments on the last patch which mostly apply
here too, aren't these mostly common with the DABT codes?

Ack, will be dropped and going to be using pre-existing FSC defines.

 

> @@ -371,10 +401,18 @@ union hsr {
>      } sysreg; /* HSR_EC_SYSREG */
>  #endif
>
> +    struct hsr_iabt {
> +        unsigned long ifsc:6;   /* Instruction fault status code */
> +        unsigned long res0:1;
> +        unsigned long s1ptw:1;  /* Fault during a stage 1 translation table walk */
> +        unsigned long res1:1;
> +        unsigned long ea:1;     /* External abort type */

Please use eat for consistency here.

You should also include the common len/cc/etc bits and sufficient
padding that the whole thing adds up to 32-bits.

Ack.

 

Ian.

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