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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [Xen-devel] [PATCH][XSA-59] VT-d: suppress UR signaling for further desktop chipsets
Jan Beulich wrote on 2014-09-16:
> This extends commit d6cb14b34f ("VT-d: suppress UR signaling for
> desktop chipsets") as per the finally obtained list of affected
> chipsets from Intel.
>
> Also pad the IDs we had listed there before to full 4 hex digits.
>
> This is CVE-2013-3495 / XSA-59.
>
> Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx>
Acked-by: Yang Zhang <yang.z.zhang@xxxxxxxxx>
> ---
> I already raised the obvious questions connected to the appearance of
> Broadwell here: Are its server chipsets affected then too, i.e. does
> the server side set of IDs need extension as well? Is the issue going
> to be fixed in hardware at some point, or will we need to indefinitely
> extend the set of IDs here?
I guess it is not easy for hardware to make some changes to fix it. Don may
know more about it.
>
> --- a/xen/drivers/passthrough/vtd/quirks.c
> +++ b/xen/drivers/passthrough/vtd/quirks.c
> @@ -466,10 +466,12 @@ void pci_vtd_quirk(const struct pci_dev
> action, seg, bus, dev, func);
> break;
> - case 0x100: case 0x104: case 0x108: /* Sandybridge */
> - case 0x150: case 0x154: case 0x158: /* Ivybridge */
> - case 0xa04: /* Haswell ULT */
> - case 0xc00: case 0xc04: case 0xc08: /* Haswell */
> + case 0x0040: case 0x0044: case 0x0048: /* Nehalem/Westmere */
> + case 0x0100: case 0x0104: case 0x0108: /* Sandybridge */
> + case 0x0150: case 0x0154: case 0x0158: /* Ivybridge */
> + case 0x0a04: /* Haswell ULT */
> + case 0x0c00: case 0x0c04: case 0x0c08: /* Haswell */
> + case 0x1600: case 0x1604: case 0x1608: /* Broadwell */
> bar = pci_conf_read32(seg, bus, dev, func, 0x6c);
> bar = (bar << 32) | pci_conf_read32(seg, bus, dev, func, 0x68);
> pa = bar & 0x7ffffff000UL; /* bits 12...38 */
>
Best regards,
Yang
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