[Xen-devel] [PATCH] x86/traps: hypervisor leaf 0x40000010 timing info

[Eric Shelton <eshelton@xxxxxxxxx>]

In October 2008 (see http://http://lwn.net/Articles/301888/),

VMware proposed (and now implements) a generic hypervisor leaf

0x40000010 to provide timing information - specifically, the TSC

frequency and the bus frequency in kHz.  Some operating systems,

including OS X, make use of these values to perform hypervisor-aware

timing.  OS X makes use of this information without regard to the

hypervisor vendor ID signature returned in leaf 0x40000000.

Signed-off-by: Eric Shelton <eshelton@xxxxxxxxx>

---

 xen/arch/x86/apic.c                 |  2 +-

 xen/arch/x86/traps.c                | 24 ++++++++++++++++++++++++

 xen/include/asm-x86/apic.h          |  1 +

 xen/include/public/arch-x86/cpuid.h |  2 +-

 4 files changed, 27 insertions(+), 2 deletions(-)

diff --git a/xen/arch/x86/apic.c b/xen/arch/x86/apic.c

index 9cbfa6a..0d5dff3 100644

--- a/xen/arch/x86/apic.c

+++ b/xen/arch/x86/apic.c

@@ -1040,6 +1040,7 @@ __next:

 

 /* used for system time scaling */

 static u32 __read_mostly bus_scale; /* scaling factor: ns -> bus cycles */

+unsigned long bus_freq; /* KAF: pointer-size avoids compile warns. */

 

 /*

  * The timer chip is already set up at HZ interrupts per second here,

@@ -1145,7 +1146,6 @@ static int __init calibrate_APIC_clock(void)

     long tt1, tt2;

     long result;

     int i;

-    unsigned long bus_freq; /* KAF: pointer-size avoids compile warns. */

     u32 bus_cycle;          /* length of one bus cycle in pico-seconds */

     const int LOOPS = HZ/10;

 

diff --git a/xen/arch/x86/traps.c b/xen/arch/x86/traps.c

index 10fc2ca..93da6ca 100644

--- a/xen/arch/x86/traps.c

+++ b/xen/arch/x86/traps.c

@@ -746,6 +746,20 @@ int cpuid_hypervisor_leaves( uint32_t idx, uint32_t sub_idx,

         hvm_hypervisor_cpuid_leaf(sub_idx, eax, ebx, ecx, edx);

         break;

 

+    case 5 ... 15:

+        *eax = 0;          /* Reserved */

+        *ebx = 0;          /* Reserved */

+        *ecx = 0;          /* Reserved */

+        *edx = 0;          /* Reserved */

+        break;

+

+    case 16:

+        *eax = d->arch.tsc_khz;  /* TSC rate (kHz) */

+        *ebx = bus_freq / 1000;  /* bus rate (kHz) */

+        *ecx = 0;          /* Reserved */

+        *edx = 0;          /* Reserved */

+        break;

+

     default:

         BUG();

     }

diff --git a/xen/include/asm-x86/apic.h b/xen/include/asm-x86/apic.h

index 6697245..6bb3713 100644

--- a/xen/include/asm-x86/apic.h

+++ b/xen/include/asm-x86/apic.h

@@ -32,6 +32,7 @@ enum apic_mode {

 extern u8 apic_verbosity;

 extern bool_t x2apic_enabled;

 extern bool_t directed_eoi_enabled;

+extern unsigned long bus_freq;

 

 void check_x2apic_preenabled(void);

 void x2apic_bsp_setup(void);

diff --git a/xen/include/public/arch-x86/cpuid.h b/xen/include/public/arch-x86/cpuid.h

index e57a457..4f90f6b 100644

--- a/xen/include/public/arch-x86/cpuid.h

+++ b/xen/include/public/arch-x86/cpuid.h

@@ -76,6 +76,6 @@

 /* Memory mapped from other domains has valid IOMMU entries */

 #define XEN_HVM_CPUID_IOMMU_MAPPINGS   (1u << 2)

 

-#define XEN_CPUID_MAX_NUM_LEAVES 4

+#define XEN_CPUID_MAX_NUM_LEAVES 16

 

 #endif /* __XEN_PUBLIC_ARCH_X86_CPUID_H__ */

-- 

1.8.5.5

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