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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [Xen-devel] [XEN/ARM PATCH v2 1/1] Add support for Exynos secure firmware
The existence of secure firmware is dictated by the presence of
"samsung,secure-firmware" in the DT.
The Arndale board does not have that entry, and uses the address as defined
in "samsung,exynos4210-sysram", offset 0 as the smp init address. This is
possibly true for all SoCs without secure firmware.
For other boards which do have a "secure-firmware" node, use sysram-ns
at offset +0x1c as the smp init address.
Have tested this on the Odroid XU. I have also tested the other code path
on the Odroid XU by removing "secure-firmware" from its DT. I could see
that the other code path was exercised with correct smp init address
values.
Signed-off-by: Suriyan Ramasami <suriyan.r@xxxxxxxxx>
---
This patch is based off of the staging area.
Changes between versions as follows:
v2:
Consolidate exynos_smp_init_getbaseandoffset().
Use the size from the DT as mapping length conistently.
Do not check if the poking addresses are within size. We just expect it
to be.
Add smc call in cpu bring up code. Linux does this call irrespective of
the presence of "secure-firmware" in the DT.
Blacklist "samsung,secure-firmware".
Change subject line appropriately.
v1:
Unbreak Arndale XEN boot.
Remove BUG_ON for checking the address offsets that we poke with.
Instead use the size field from the DT to make valid comaprisons.
---
xen/arch/arm/platforms/exynos5.c | 98 ++++++++++++++++++++++++++++------------
1 file changed, 70 insertions(+), 28 deletions(-)
diff --git a/xen/arch/arm/platforms/exynos5.c b/xen/arch/arm/platforms/exynos5.c
index 22a38f0..8fb301b 100644
--- a/xen/arch/arm/platforms/exynos5.c
+++ b/xen/arch/arm/platforms/exynos5.c
@@ -28,11 +28,16 @@
#include <asm/platform.h>
#include <asm/io.h>
+/* This corresponds to CONFIG_NR_CPUS in linux config */
+#define EXYNOS_CONFIG_NR_CPUS 0x08
+
#define EXYNOS_ARM_CORE0_CONFIG 0x2000
-#define EXYNOS_ARM_CORE_CONFIG(_nr) (0x80 * (_nr))
+#define EXYNOS_ARM_CORE_CONFIG(_nr) (EXYNOS_ARM_CORE0_CONFIG + (0x80 * (_nr)))
#define EXYNOS_ARM_CORE_STATUS(_nr) (EXYNOS_ARM_CORE_CONFIG(_nr) + 0x4)
#define S5P_CORE_LOCAL_PWR_EN 0x3
+#define SMC_CMD_CPU1BOOT (-4)
+
static int exynos5_init_time(void)
{
uint32_t reg;
@@ -42,8 +47,6 @@ static int exynos5_init_time(void)
u64 mct_base_addr;
u64 size;
- BUILD_BUG_ON(EXYNOS5_MCT_G_TCON >= PAGE_SIZE);
-
node = dt_find_compatible_node(NULL, NULL, "samsung,exynos4210-mct");
if ( !node )
{
@@ -61,7 +64,7 @@ static int exynos5_init_time(void)
dprintk(XENLOG_INFO, "mct_base_addr: %016llx size: %016llx\n",
mct_base_addr, size);
- mct = ioremap_attr(mct_base_addr, PAGE_SIZE, PAGE_HYPERVISOR_NOCACHE);
+ mct = ioremap_attr(mct_base_addr, size, PAGE_HYPERVISOR_NOCACHE);
if ( !mct )
{
dprintk(XENLOG_ERR, "Unable to map MCT\n");
@@ -91,32 +94,62 @@ static int exynos5250_specific_mapping(struct domain *d)
return 0;
}
-static int __init exynos5_smp_init(void)
+static int exynos_smp_init_getbasesizeoffset(u64 *sysram_addr,
+ u64 *size,
+ u64 *sysram_offset)
{
- void __iomem *sysram;
struct dt_device_node *node;
- u64 sysram_ns_base_addr;
- u64 size;
int rc;
+ char *compatible;
+
+ node = dt_find_compatible_node(NULL, NULL, "samsung,secure-firmware");
+ if ( node )
+ {
+ /* Have to use sysram_ns_base_addr + 0x1c for boot address */
+ compatible = "samsung,exynos4210-sysram-ns";
+ *sysram_offset = 0x1c;
+ printk("Running under secure firmware.\n");
+ }
+ else
+ {
+ /* Have to use sysram_base_addr + offset 0 for boot address */
+ compatible = "samsung,exynos4210-sysram";
+ *sysram_offset = 0;
+ }
- node = dt_find_compatible_node(NULL, NULL, "samsung,exynos4210-sysram");
+ node = dt_find_compatible_node(NULL, NULL, compatible);
if ( !node )
{
- dprintk(XENLOG_ERR, "samsung,exynos4210-sysram-ns missing in DT\n");
+ dprintk(XENLOG_ERR, "%s missing in DT\n", compatible);
return -ENXIO;
}
- rc = dt_device_get_address(node, 0, &sysram_ns_base_addr, &size);
+ rc = dt_device_get_address(node, 0, sysram_addr, size);
if ( rc )
{
- dprintk(XENLOG_ERR, "Error in \"samsung,exynos4210-sysram-ns\"\n");
+ dprintk(XENLOG_ERR, "Error in %s\n", compatible);
return -ENXIO;
}
- dprintk(XENLOG_INFO, "sysram_ns_base_addr: %016llx size: %016llx\n",
- sysram_ns_base_addr, size);
+ return 0;
+}
- sysram = ioremap_nocache(sysram_ns_base_addr, PAGE_SIZE);
+static int __init exynos5_smp_init(void)
+{
+ void __iomem *sysram;
+ u64 sysram_addr;
+ u64 size;
+ u64 sysram_offset;
+ int rc;
+
+ rc = exynos_smp_init_getbasesizeoffset(&sysram_addr, &size,
&sysram_offset);
+ if ( rc )
+ return rc;
+
+ dprintk(XENLOG_INFO, "sysram_addr: %016llx size: %016llx offset:
%016llx\n",
+ sysram_addr, size, sysram_offset);
+
+ sysram = ioremap_nocache(sysram_addr, size);
if ( !sysram )
{
dprintk(XENLOG_ERR, "Unable to map exynos5 MMIO\n");
@@ -125,7 +158,7 @@ static int __init exynos5_smp_init(void)
printk("Set SYSRAM to %"PRIpaddr" (%p)\n",
__pa(init_secondary), init_secondary);
- writel(__pa(init_secondary), sysram);
+ writel(__pa(init_secondary), sysram + sysram_offset);
iounmap(sysram);
@@ -135,7 +168,7 @@ static int __init exynos5_smp_init(void)
static int exynos_cpu_power_state(void __iomem *power, int cpu)
{
return __raw_readl(power + EXYNOS_ARM_CORE_STATUS(cpu)) &
- S5P_CORE_LOCAL_PWR_EN;
+ S5P_CORE_LOCAL_PWR_EN;
}
static void exynos_cpu_power_up(void __iomem *power, int cpu)
@@ -171,8 +204,7 @@ static int exynos5_cpu_power_up(void __iomem *power, int
cpu)
return 0;
}
-static int exynos5_get_pmu_base_addr(u64 *power_base_addr) {
- u64 size;
+static int exynos5_get_pmu_baseandsize(u64 *power_base_addr, u64 *size) {
struct dt_device_node *node;
int rc;
static const struct dt_device_match exynos_dt_pmu_matches[] __initconst =
@@ -190,7 +222,7 @@ static int exynos5_get_pmu_base_addr(u64 *power_base_addr) {
return -ENXIO;
}
- rc = dt_device_get_address(node, 0, power_base_addr, &size);
+ rc = dt_device_get_address(node, 0, power_base_addr, size);
if ( rc )
{
dprintk(XENLOG_ERR, "Error in \"samsung,exynos5XXX-pmu\"\n");
@@ -198,23 +230,31 @@ static int exynos5_get_pmu_base_addr(u64
*power_base_addr) {
}
dprintk(XENLOG_DEBUG, "power_base_addr: %016llx size: %016llx\n",
- *power_base_addr, size);
+ *power_base_addr, *size);
return 0;
}
+static void exynos_smc(u32 cmd, u32 arg1, u32 arg2, u32 arg3)
+{
+ asm(
+ "dsb;"
+ "smc #0;"
+ );
+}
+
static int exynos5_cpu_up(int cpu)
{
u64 power_base_addr;
+ u64 size;
void __iomem *power;
int rc;
- rc = exynos5_get_pmu_base_addr(&power_base_addr);
+ rc = exynos5_get_pmu_baseandsize(&power_base_addr, &size);
if ( rc )
return rc;
- power = ioremap_nocache(power_base_addr +
- EXYNOS_ARM_CORE0_CONFIG, PAGE_SIZE);
+ power = ioremap_nocache(power_base_addr, size);
if ( !power )
{
dprintk(XENLOG_ERR, "Unable to map power MMIO\n");
@@ -230,22 +270,23 @@ static int exynos5_cpu_up(int cpu)
iounmap(power);
+ exynos_smc(SMC_CMD_CPU1BOOT, cpu, 0, 0);
+
return cpu_up_send_sgi(cpu);
}
static void exynos5_reset(void)
{
u64 power_base_addr;
+ u64 size;
void __iomem *pmu;
int rc;
- BUILD_BUG_ON(EXYNOS5_SWRESET >= PAGE_SIZE);
-
- rc = exynos5_get_pmu_base_addr(&power_base_addr);
+ rc = exynos5_get_pmu_baseandsize(&power_base_addr, &size);
if ( rc )
return;
- pmu = ioremap_nocache(power_base_addr, PAGE_SIZE);
+ pmu = ioremap_nocache(power_base_addr, size);
if ( !pmu )
{
dprintk(XENLOG_ERR, "Unable to map PMU\n");
@@ -264,6 +305,7 @@ static const struct dt_device_match exynos5_blacklist_dev[]
__initconst =
* This is result to random freeze.
*/
DT_MATCH_COMPATIBLE("samsung,exynos4210-mct"),
+ DT_MATCH_COMPATIBLE("samsung,secure-firmware"),
{ /* sentinel */ },
};
--
1.9.1
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