[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [Xen-devel] [PATCH v2 8/9] xen: arm: support for up to 48-bit physical addressing on arm64
Hi Ian, On 04/09/14 09:14, Ian Campbell wrote: This only affects Xen's own stage one paging. - Use symbolic names for TCR bits for clarity. - Update PADDR_BITS - Base field of LPAE PT structs is now 36 bits (and therefore unsigned long long for arm32 compatibility) - TCR_EL2.PS is set from ID_AA64MMFR0_EL1.PASize. - Provide decode of ID_AA64MMFR0_EL1 in CPU info Parts of this are derived from "xen/arm: Add 4-level page table for stage 2 translation" by Vijaya Kumar K. Signed-off-by: Ian Campbell <ian.campbell@xxxxxxxxxx> Reviewed-by: Julien Grall <julien.grall@xxxxxxxxxx> Regards, -- Julien Grall _______________________________________________ Xen-devel mailing list Xen-devel@xxxxxxxxxxxxx http://lists.xen.org/xen-devel
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