Re: [Xen-devel] [PATCH] x86: remove redundancy of MSR_P6_{PERFCTR, EVNTSEL} definitions

[Andrew Cooper <andrew.cooper3@xxxxxxxxxx>]

On 03/09/14 13:26, Jan Beulich wrote:
> --- a/xen/include/asm-x86/msr-index.h
> +++ b/xen/include/asm-x86/msr-index.h
> @@ -112,11 +112,6 @@
>  
>  #define MSR_AMD64_MCx_MASK(x)                (MSR_AMD64_MC0_MASK + (x))
>  
> -#define MSR_P6_PERFCTR0                      0x000000c1
> -#define MSR_P6_PERFCTR1                      0x000000c2
> -#define MSR_P6_EVNTSEL0                      0x00000186
> -#define MSR_P6_EVNTSEL1                      0x00000187
> -
>  /* MSRs & bits used for VMX enabling */
>  #define MSR_IA32_VMX_BASIC                      0x480
>  #define MSR_IA32_VMX_PINBASED_CTLS              0x481
> @@ -329,8 +324,8 @@
>  #define MSR_IA32_ENERGY_PERF_BIAS    0x000001b0
>  
>  /* Intel Model 6 */
> -#define MSR_P6_EVNTSEL0                      0x00000186
> -#define MSR_P6_EVNTSEL1                      0x00000187
> +#define MSR_P6_PERFCTR(n)            (0x000000c1 + (n))
> +#define MSR_P6_EVNTSEL(n)            (0x00000186 + (n))
>  
>  /* P4/Xeon+ specific */
>  #define MSR_IA32_MCG_EAX             0x00000180
> @@ -488,7 +483,4 @@
>  #define _MSR_MISC_FEATURES_CPUID_FAULTING    0
>  #define MSR_MISC_FEATURES_CPUID_FAULTING     (1ULL << 
> _MSR_MISC_FEATURES_CPUID_FAULTING)
>  
> -/* Geode defined MSRs */
> -#define MSR_GEODE_BUSCONT_CONF0              0x00001900
> -

Is this geode removal related to the patch?

Other than this hunk, Reviewed-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>

~Andrew


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