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Re: [Xen-devel] [PATCH RFC v2 1/4] x86/mm: Shadow and p2m changes for PV mem_access

>>> On 22.08.14 at 22:02, <andrew.cooper3@xxxxxxxxxx> wrote:
> On 22/08/14 20:48, Aravindh Puthiyaparambil (aravindp) wrote:
>> Sigh, if only I could bound the CR0.WP solution :-(
> I wonder whether, in the case that mem_access is enabled, it would be
> reasonable to perform the CR0.WP sections with interrupts disabled?

Which still wouldn't cover NMIs (albeit we might be able to live with
that). But what's worse - taking faults with interrupts disabled
requires extra care, and annotating code normally run with
interrupts enabled with the special .ex_table.pre annotations
doesn't seem like a very nice route, as that could easily hide other
problems in the future.


> The user/admin is already taking a performance hit from mem_access in
> the first place, and delaying hardware interrupts a little almost
> certainly a lesser evil than whatever mad scheme we devise to fix these
> issues.
> With interrupts disabled, the CR0.WP problem is very well bounded.  The
> only faults which will occur will be as a direct result of the actions
> performed, where the fault handlers will follow the extable redirection
> and return quickly.
> ~Andrew

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