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Re: [Xen-devel] [V0 PATCH 0/2] AMD PVH domU support

To: Mukesh Rathor <mukesh.rathor@xxxxxxxxxx>, <boris.ostrovsky@xxxxxxxxxx>
From: David Vrabel <david.vrabel@xxxxxxxxxx>
Date: Fri, 22 Aug 2014 14:52:41 +0100
Cc: xen-devel@xxxxxxxxxxxxxxxxxxxx, linux-kernel@xxxxxxxxxxxxxxx
Delivery-date: Fri, 22 Aug 2014 13:53:01 +0000
List-id: Xen developer discussion <xen-devel.lists.xen.org>

On 21/08/14 03:16, Mukesh Rathor wrote:
> Hi,
> 
> Here's first stab at AMD PVH domU support. Pretty much the only thing
> needed is EFER bits set. Please review.

I'm not going to accept this until there is some ABI documentation
stating explicitly what state non-boot CPUs will be in.

I'm particularly concerned that: a) there is a difference between AMD
and Intel; and b) you want to change the ABI by clearing a the EFER.SCE bit.

David

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Follow-Ups:
- Re: [Xen-devel] [V0 PATCH 0/2] AMD PVH domU support
  - From: Mukesh Rathor
- Re: [Xen-devel] [V0 PATCH 0/2] AMD PVH domU support
  - From: David Vrabel

References:
- [Xen-devel] [V0 PATCH 0/2] AMD PVH domU support
  - From: Mukesh Rathor

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