[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [Xen-devel] [PATCH v8 13/19] x86/VPMU: Add support for PMU register handling on PV guests
>>> On 01.07.14 at 16:37, <boris.ostrovsky@xxxxxxxxxx> wrote: > @@ -2556,7 +2564,19 @@ static int emulate_privileged_op(struct cpu_user_regs > *regs) > if ( v->arch.debugreg[7] & DR7_ACTIVE_MASK ) > wrmsrl(regs->_ecx, msr_content); > break; > - > + case MSR_P6_PERFCTR0...MSR_P6_PERFCTR1: > + case MSR_P6_EVNTSEL0...MSR_P6_EVNTSEL1: > + case MSR_CORE_PERF_FIXED_CTR0...MSR_CORE_PERF_FIXED_CTR2: > + case MSR_CORE_PERF_FIXED_CTR_CTRL...MSR_CORE_PERF_GLOBAL_OVF_CTRL: > + if ( boot_cpu_data.x86_vendor == X86_VENDOR_INTEL ) > + vpmu_msr = 1; > + case MSR_AMD_FAM15H_EVNTSEL0...MSR_AMD_FAM15H_PERFCTR5: > + if ( vpmu_msr || (boot_cpu_data.x86_vendor == X86_VENDOR_AMD) ) > + { I don't think this works the way you want it to - all the Intel MSRs would make it here on AMD CPUs too afaict. > + if ( vpmu_do_wrmsr(regs->ecx, msr_content) ) > + goto fail; > + break; > + } > default: There ought to be a fall-through annotation here. Jan _______________________________________________ Xen-devel mailing list Xen-devel@xxxxxxxxxxxxx http://lists.xen.org/xen-devel
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