[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [Xen-devel] [PATCH v8 4/7] xen/arm: Add virtual GICv3 support
On 07/28/2014 03:55 PM, Ian Campbell wrote: > On Mon, 2014-07-28 at 15:35 +0100, Ian Campbell wrote: >> FYI I'm seeing a trap in gicv3_init when running on a model. I haven't >> tracked it down to an actual location yet though. I'll let you know what >> I find. > > The access to ICC_BPR1_EL1 in gicv3_cpu_init is faulting for some > reason. do_hyp_trap is then access current-> but it is too soon to do > that, hence a data abort occurs which is what I was seeing. > > This is on a fast model with the boot-wrapper, perhaps the "firmware" > failed to setup something? IIRC, the "firmware" has to configure some register in secure. I suspect it's ICC_SRE_EL1. I guess your bootwrapper already contains this stuff. > BTW, ICC_BPR1_EL1 is the secure alias of the NS version of the register. > Why not just use the NS version directly? AFAIU the spec, the name is not different between secure and non-secure. The processor will know it following the state. Regards, -- Julien Grall _______________________________________________ Xen-devel mailing list Xen-devel@xxxxxxxxxxxxx http://lists.xen.org/xen-devel
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