[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [Xen-devel] [PATCH v8 03/10] xen/arm: inflight irqs during migration
On Thu, 24 Jul 2014, Ian Campbell wrote: > On Thu, 2014-07-24 at 17:45 +0100, Stefano Stabellini wrote: > > > Are you sure about the second physical IRQ always hitting on the source > > > pCPU though? I'm unclear about where the physical ITARGETSR gets written > > > in the scheme you are proposing. > > > > It gets written right away if there are no inflight irqs. > > There's no way that something can be pending in the physical GIC at this > point? i.e. because it happened since we took the trap? If it is pending is OK: ARM ARM states that writes to itarget affect pending irqs too. Only active irqs are not affected. But we deal with that case separately. > > Otherwise it > > gets written when clearing the LRs. That's why we are sure it is going > > to hit the old cpu. If the vcpu gets descheduled after EOIing the irq, > > that is also fine because Xen is going to clear the LRs on hypervisor > > entry. > > Ian. > _______________________________________________ Xen-devel mailing list Xen-devel@xxxxxxxxxxxxx http://lists.xen.org/xen-devel
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