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Re: [Xen-devel] [PATCH v7 4/5] xen/arm: add SGI handling for GICv3



On Tue, Jul 22, 2014 at 7:43 PM, Vijay Kilari <vijay.kilari@xxxxxxxxx> wrote:
> On Tue, Jul 22, 2014 at 7:18 PM, Stefano Stabellini
> <stefano.stabellini@xxxxxxxxxxxxx> wrote:
>> On Fri, 11 Jul 2014, vijay.kilari@xxxxxxxxx wrote:
>>> From: Vijaya Kumar K <Vijaya.Kumar@xxxxxxxxxxxxxxxxxx>
>>>
>>> In ARMv8, write to ICC_SGI1R_EL1 register raises trap to EL2.
>>> Handle the trap and inject SGI to vcpu.
>>>
>>> Signed-off-by: Vijaya Kumar K <Vijaya.Kumar@xxxxxxxxxxxxxxxxxx>
>>> ---
>>> v7: - Introduced callback for sysreg emulation
>>>     - Removed unused parameter in inject_undef_exception()
>>>     - Use inject_undef64_exception for reporting sysreg
>>>       handling failure
>>>
>>> v6: - Removed forward declaration of vgic_to_sgi() in vgic-v3.c
>>>     - Used vgic callback for SGI handling
>>>     - Alignment changes
>>> ---
>>>  xen/arch/arm/traps.c              |   15 +++++++++++
>>>  xen/arch/arm/vgic-v3.c            |   52 
>>> +++++++++++++++++++++++++++++++++++++
>>>  xen/arch/arm/vgic.c               |    7 +++++
>>>  xen/include/asm-arm/gic_v3_defs.h |    7 +++++
>>>  xen/include/asm-arm/sysregs.h     |    3 +++
>>>  xen/include/asm-arm/vgic.h        |    3 +++
>>>  6 files changed, 87 insertions(+)
>>>
>>> diff --git a/xen/arch/arm/traps.c b/xen/arch/arm/traps.c
>>> index 686d8b7..775bef1 100644
>>> --- a/xen/arch/arm/traps.c
>>> +++ b/xen/arch/arm/traps.c
>>> @@ -41,6 +41,7 @@
>>>  #include "decode.h"
>>>  #include "vtimer.h"
>>>  #include <asm/gic.h>
>>> +#include <asm/vgic.h>
>>>
>>>  /* The base of the stack must always be double-word aligned, which means
>>>   * that both the kernel half of struct cpu_user_regs (which is pushed in
>>> @@ -1641,6 +1642,20 @@ static void do_sysreg(struct cpu_user_regs *regs,
>>>              domain_crash_synchronous();
>>>          }
>>>          break;
>>> +    case HSR_SYSREG_ICC_SGI1R_EL1:
>>> +        if ( !vgic_emulate(regs, hsr) )
>>> +        {
>>> +            dprintk(XENLOG_WARNING,
>>> +                    "failed emulation of sysreg ICC_SGI1R_EL1 access\n");
>>> +            inject_undef64_exception(regs, hsr.len);
>>> +        }
>>> +        break;
>>> +    case HSR_SYSREG_ICC_SGI0R_EL1:
>>> +    case HSR_SYSREG_ICC_ASGI1R_EL1:
>>> +        /* TBD: Implement to support secure grp0/1 SGI forwarding */
>>> +        dprintk(XENLOG_WARNING,
>>> +                "Emulation of sysreg ICC_SGI0R_EL1/ASGI1R_EL1 not 
>>> supported\n");
>>> +        inject_undef64_exception(regs, hsr.len);
>>>      default:
>>>   bad_sysreg:
>>>          {
>>> diff --git a/xen/arch/arm/vgic-v3.c b/xen/arch/arm/vgic-v3.c
>>> index 2bf0e7c..feee486 100644
>>> --- a/xen/arch/arm/vgic-v3.c
>>> +++ b/xen/arch/arm/vgic-v3.c
>>> @@ -834,6 +834,57 @@ write_ignore_64:
>>>      return 1;
>>>  }
>>>
>>> +static int vgicv3_to_sgi(struct vcpu *v, register_t sgir)
>>> +{
>>> +    int virq;
>>> +    int irqmode;
>>> +    enum gic_sgi_mode sgi_mode;
>>> +    unsigned long vcpu_mask = 0;
>>> +
>>> +    irqmode = (sgir >> ICH_SGI_IRQMODE_SHIFT) & ICH_SGI_IRQMODE_MASK;
>>> +    virq = (sgir >> ICH_SGI_IRQ_SHIFT ) & ICH_SGI_IRQ_MASK;
>>> +    vcpu_mask = sgir & ICH_SGI_TARGETLIST_MASK;
>>> +
>>> +    /* Map GIC sgi value to enum value */
>>> +    switch ( irqmode )
>>> +    {
>>> +    case ICH_SGI_TARGET_LIST:
>>> +        sgi_mode = SGI_TARGET_LIST;
>>> +        break;
>>> +    case ICH_SGI_TARGET_OTHERS:
>>> +        sgi_mode = SGI_TARGET_OTHERS;
>>> +        break;
>>> +    default:
>>> +        BUG();
>>
>> You haven't addressed my previous comments (or replied to them if you
>> disagree):
>>
>> http://marc.info/?l=xen-devel&m=140259344723979
>
>  OK. A warning and return 0 will address the issue
>
>> http://marc.info/?l=xen-devel&m=140259388524231

    SGI's are injected at Rdist-0 level. So affinity 1,2,3 levels are ignored
    Do we still need a comment?

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