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[Xen-devel] [PATCH RFC 3/9] xen: Force-enable relevant MSR events; optimize the number of sent MSR events


  • To: xen-devel@xxxxxxxxxxxxx
  • From: Razvan Cojocaru <rcojocaru@xxxxxxxxxxxxxxx>
  • Date: Wed, 2 Jul 2014 16:33:55 +0300
  • Cc: tim@xxxxxxx, Razvan Cojocaru <rcojocaru@xxxxxxxxxxxxxxx>
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  • Delivery-date: Wed, 02 Jul 2014 13:34:25 +0000
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  • List-id: Xen developer discussion <xen-devel.lists.xen.org>

Vmx_disable_intercept_for_msr() will now refuse to disable interception of
MSRs needed by the memory introspection library.

Signed-off-by: Razvan Cojocaru <rcojocaru@xxxxxxxxxxxxxxx>
---
 xen/arch/x86/hvm/vmx/vmcs.c |   19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

diff --git a/xen/arch/x86/hvm/vmx/vmcs.c b/xen/arch/x86/hvm/vmx/vmcs.c
index 8ffc562..eb3f030 100644
--- a/xen/arch/x86/hvm/vmx/vmcs.c
+++ b/xen/arch/x86/hvm/vmx/vmcs.c
@@ -700,6 +700,25 @@ void vmx_disable_intercept_for_msr(struct vcpu *v, u32 
msr, int type)
     if ( msr_bitmap == NULL )
         return;
 
+    /* Filter out MSR-s needed by the memory introspection engine */
+    switch ( msr )
+    {
+    case MSR_IA32_SYSENTER_EIP:
+    case MSR_IA32_SYSENTER_ESP:
+    case MSR_IA32_SYSENTER_CS:
+    case MSR_IA32_MC0_CTL:
+    case MSR_STAR:
+    case MSR_LSTAR:
+
+        printk("Warning: cannot disable the interception of MSR "
+            "0x%08x because it is needed by the memory introspection "
+            "engine\n", msr);
+        return;
+
+    default:
+        break;
+    }
+
     /*
      * See Intel PRM Vol. 3, 20.6.9 (MSR-Bitmap Address). Early manuals
      * have the write-low and read-high bitmap offsets the wrong way round.
-- 
1.7.9.5


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