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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [Xen-devel] [PATCH v6 3/5] xen/arm: Implement virtual-linear page table for guest
Implement vlpt (virtual-linear page table) for fast accessing of 3rd PTE of
guest p2m.
When creating a mapping for vlpt, just copy the 1st level PTE of guest p2m to
the xen's
2nd level PTE. Then the mapping becomes the following:
xen's 1st PTE -->
xen's 2nd PTE (which is the same as 1st PTE of guest p2m) -->
guest p2m's 2nd PTE -->
guest p2m's 3rd PTE (the memory contents where the vlpt points)
For more info about vlpt, see:
http://www.technovelty.org/linux/virtual-linear-page-table.html
This function is used in dirty-page tracing: when domU write-fault is trapped
by xen,
xen can immediately locate the 3rd PTE of guest p2m.
The following link shows the performance comparison for handling a dirty-page
between
vlpt and typical page table walking.
http://lists.xen.org/archives/html/xen-devel/2013-08/msg01503.html
Signed-off-by: Jaeyong Yoo <jaeyong.yoo@xxxxxxxxxxx>
Signed-off-by: Junghyun Yoo <yjhyun.yoo@xxxxxxxxxxx>
---
xen/arch/arm/domain.c | 14 +++++++
xen/arch/arm/mm.c | 83 ++++++++++++++++++++++++++++++++++++++++
xen/include/asm-arm/arm32/page.h | 36 +++++++++++++----
xen/include/asm-arm/config.h | 18 +++++++--
xen/include/asm-arm/domain.h | 9 +++++
xen/include/asm-arm/mm.h | 24 ++++++++++++
6 files changed, 173 insertions(+), 11 deletions(-)
diff --git a/xen/arch/arm/domain.c b/xen/arch/arm/domain.c
index 2ae6941..4978765 100644
--- a/xen/arch/arm/domain.c
+++ b/xen/arch/arm/domain.c
@@ -208,6 +208,12 @@ static void ctxt_switch_to(struct vcpu *n)
isb();
+ /* for dirty-page tracing
+ * XXX: how do we consider SMP case?
+ */
+ if ( n->domain->arch.dirty.mode )
+ restore_vlpt(n->domain);
+
/* This is could trigger an hardware interrupt from the virtual
* timer. The interrupt needs to be injected into the guest. */
WRITE_SYSREG32(n->arch.cntkctl, CNTKCTL_EL1);
@@ -504,6 +510,14 @@ int arch_domain_create(struct domain *d, unsigned int
domcr_flags)
/* Default the virtual ID to match the physical */
d->arch.vpidr = boot_cpu_data.midr.bits;
+ /* init for dirty-page tracing */
+ d->arch.dirty.mode = 0;
+
+ d->arch.dirty.p2m_start_idx = 0;
+ d->arch.dirty.p2m_end_idx = 0;
+ d->arch.dirty.p2m_first[0] = NULL;
+ d->arch.dirty.p2m_first[1] = NULL;
+
clear_page(d->shared_info);
share_xen_page_with_guest(
virt_to_page(d->shared_info), d, XENSHARE_writable);
diff --git a/xen/arch/arm/mm.c b/xen/arch/arm/mm.c
index 7e8e06a..0fc9d9a 100644
--- a/xen/arch/arm/mm.c
+++ b/xen/arch/arm/mm.c
@@ -1245,6 +1245,89 @@ void clear_and_clean_page(struct page_info *page)
unmap_domain_page(p);
}
+paddr_t get_gma_end(struct domain *d)
+{
+ return GUEST_RAM_BASE + ((paddr_t) d->max_pages << PAGE_SHIFT);
+}
+
+/* restore the xen page table for vlpt mapping for domain d */
+void restore_vlpt(struct domain *d)
+{
+ int vlpt_base_idx;
+ int i;
+ lpae_t *map = this_cpu(xen_dommap);
+
+ vlpt_base_idx = VLPT_VA_TO_IDX(VIRT_LIN_P2M_START);
+ dsb(sy);
+ for ( i = d->arch.dirty.p2m_start_idx; i < d->arch.dirty.p2m_end_idx; ++i )
+ {
+ uint32_t in = INNER_IDX(i, LPAE_ENTRIES);
+ uint32_t out = OUTER_IDX(i, LPAE_ENTRIES);
+ if ( map[vlpt_base_idx+i].bits !=
+ d->arch.dirty.p2m_first[out][in].bits )
+ {
+ write_pte(&map[vlpt_base_idx+i],
+ d->arch.dirty.p2m_first[out][in]);
+ __flush_xen_data_tlb_range_va(VLPT_IDX_TO_VA(vlpt_base_idx+i),
+ VLPT_SIZE);
+ }
+ }
+ dsb(sy);
+ isb();
+}
+
+/* setting up the xen page table for vlpt mapping for domain d */
+int prepare_vlpt(struct domain *d)
+{
+ int vlpt_base_idx;
+ int p2m_start_index, p2m_end_index;
+ struct p2m_domain *p2m = &d->arch.p2m;
+ paddr_t gma_start = GUEST_RAM_BASE;
+ paddr_t gma_end = 0;
+ uint64_t required, avail = VIRT_LIN_P2M_END - VIRT_LIN_P2M_START;
+
+ gma_end = get_gma_end(d);
+ required = ((gma_end - gma_start) >> PAGE_SHIFT) * (sizeof(lpae_t));
+
+ vlpt_base_idx = VLPT_VA_TO_IDX(VIRT_LIN_P2M_START);
+
+ if ( required > avail )
+ {
+ dprintk(XENLOG_ERR, "Available VLPT is small for domU guest"
+ "(avail: %llx, required: %llx)\n",
+ avail, required);
+ return -ENOMEM;
+ }
+
+ p2m_start_index = gma_start >> FIRST_SHIFT;
+ p2m_end_index = (gma_end >> FIRST_SHIFT) + 1;
+
+ if ( vlpt_base_idx + p2m_end_index >= LPAE_ENTRIES * 2 )
+ {
+ dprintk(XENLOG_ERR, "xen second page is small for VLPT for domU");
+ return -ENOMEM;
+ }
+
+ /* First level p2m is 2 consecutive pages */
+ d->arch.dirty.p2m_first[0] = map_domain_page_global(
+ page_to_mfn(p2m->first_level) );
+ d->arch.dirty.p2m_first[1] = map_domain_page_global(
+ page_to_mfn(p2m->first_level+1) );
+
+ /* storing the start and end index of guest p2m first*/
+ d->arch.dirty.p2m_start_idx = p2m_start_index;
+ d->arch.dirty.p2m_end_idx = p2m_end_index;
+
+ return 0;
+}
+
+void cleanup_vlpt(struct domain *d)
+{
+ /* First level p2m is 2 consecutive pages */
+ unmap_domain_page_global(d->arch.dirty.p2m_first[0]);
+ unmap_domain_page_global(d->arch.dirty.p2m_first[1]);
+}
+
/*
* Local variables:
* mode: C
diff --git a/xen/include/asm-arm/arm32/page.h b/xen/include/asm-arm/arm32/page.h
index 4abb281..7377557 100644
--- a/xen/include/asm-arm/arm32/page.h
+++ b/xen/include/asm-arm/arm32/page.h
@@ -3,22 +3,31 @@
#ifndef __ASSEMBLY__
-/* Write a pagetable entry.
+/*
+ * Write a pagetable entry.
*
- * If the table entry is changing a text mapping, it is responsibility
- * of the caller to issue an ISB after write_pte.
+ * All necessary barriers are responsibility of the caller
*/
-static inline void write_pte(lpae_t *p, lpae_t pte)
+static inline void __write_pte(lpae_t *p, lpae_t pte)
{
asm volatile (
- /* Ensure any writes have completed with the old mappings. */
- "dsb;"
/* Safely write the entry (STRD is atomic on CPUs that support LPAE) */
"strd %0, %H0, [%1];"
- "dsb;"
: : "r" (pte.bits), "r" (p) : "memory");
}
+/* Write a pagetable entry.
+ *
+ * If the table entry is changing a text mapping, it is responsibility
+ * of the caller to issue an ISB after write_pte.
+ */
+static inline void write_pte(lpae_t *p, lpae_t pte)
+{
+ dsb();
+ __write_pte(p, pte);
+ dsb();
+}
+
/* Inline ASM to flush dcache on register R (may be an inline asm operand) */
#define __clean_xen_dcache_one(R) STORE_CP32(R, DCCMVAC)
@@ -74,6 +83,19 @@ static inline void __flush_xen_data_tlb_one(vaddr_t va)
asm volatile(STORE_CP32(0, TLBIMVAHIS) : : "r" (va) : "memory");
}
+/*
+ * Flush a range of VA's hypervisor mappings from the data TLB.
+ * All necessary barriers are responsibility of the caller
+ */
+static inline void __flush_xen_data_tlb_range_va(unsigned long va, unsigned
long size)
+{
+ unsigned long end = va + size;
+ while ( va < end ) {
+ __flush_xen_data_tlb_one(va);
+ va += PAGE_SIZE;
+ }
+}
+
/* Ask the MMU to translate a VA for us */
static inline uint64_t __va_to_par(vaddr_t va)
{
diff --git a/xen/include/asm-arm/config.h b/xen/include/asm-arm/config.h
index 1c3abcf..337bb7c 100644
--- a/xen/include/asm-arm/config.h
+++ b/xen/include/asm-arm/config.h
@@ -93,7 +93,8 @@
* space
*
* 1G - 2G Xenheap: always-mapped memory
- * 2G - 4G Domheap: on-demand-mapped
+ * 2G - 3G 896M Domheap: on-demand-mapped
+ * 3G 896M - 4G Virtual-linear mapping to P2M table (128MB size)
*
* ARM64 layout:
* 0x0000000000000000 - 0x0000007fffffffff (512GB, L0 slot [0])
@@ -130,14 +131,21 @@
#define XENHEAP_VIRT_START _AT(vaddr_t,0x40000000)
#define XENHEAP_VIRT_END _AT(vaddr_t,0x7fffffff)
#define DOMHEAP_VIRT_START _AT(vaddr_t,0x80000000)
-#define DOMHEAP_VIRT_END _AT(vaddr_t,0xffffffff)
+#define DOMHEAP_VIRT_END _AT(vaddr_t,0xe7ffffff)
+#define VIRT_LIN_P2M_START _AT(vaddr_t,0xe8000000)
+#define VIRT_LIN_P2M_END _AT(vaddr_t,0xffffffff)
#define VMAP_VIRT_END XENHEAP_VIRT_START
-#define DOMHEAP_ENTRIES 1024 /* 1024 2MB mapping slots */
+/* 1024 2MB mapping slots */
+#define DOMHEAP_ENTRIES ((DOMHEAP_VIRT_END - DOMHEAP_VIRT_START+1) >>
SECOND_SHIFT)
/* Number of domheap pagetable pages required at the second level (2MB
mappings) */
-#define DOMHEAP_SECOND_PAGES ((DOMHEAP_VIRT_END - DOMHEAP_VIRT_START + 1) >>
FIRST_SHIFT)
+/* We piggy-back VLPT areas in the back of domain heap, so the one that
actually
+ * allocated for domheap table should be domheap size + vlpt size. */
+#define __DOMHEAP_SIZE (DOMHEAP_VIRT_END - DOMHEAP_VIRT_START + 1)
+#define __VLPT_SIZE (VIRT_LIN_P2M_END - VIRT_LIN_P2M_START + 1)
+#define DOMHEAP_SECOND_PAGES ((__DOMHEAP_SIZE + __VLPT_SIZE) >> FIRST_SHIFT)
#else /* ARM_64 */
@@ -159,6 +167,8 @@
#define HYPERVISOR_VIRT_END DIRECTMAP_VIRT_END
+/*TODO (ARM_64): define VIRT_LIN_P2M_START VIRT_LIN_P2M_END */
+
#endif
/* Fixmap slots */
diff --git a/xen/include/asm-arm/domain.h b/xen/include/asm-arm/domain.h
index b296923..9674175 100644
--- a/xen/include/asm-arm/domain.h
+++ b/xen/include/asm-arm/domain.h
@@ -164,6 +164,15 @@ struct arch_domain
} vuart;
unsigned int evtchn_irq;
+
+ /* dirty-page tracing */
+ struct {
+ int mode; /* 1 if dirty pages tracing enabled */
+ lpae_t *p2m_first[2]; /* copy of guest p2m's first */
+ int p2m_start_idx; /* start index of p2m_first */
+ int p2m_end_idx; /* end index of p2m_first */
+ } dirty;
+
} __cacheline_aligned;
struct arch_vcpu
diff --git a/xen/include/asm-arm/mm.h b/xen/include/asm-arm/mm.h
index 3bef93f..7ceb568 100644
--- a/xen/include/asm-arm/mm.h
+++ b/xen/include/asm-arm/mm.h
@@ -344,6 +344,30 @@ static inline void put_page_and_type(struct page_info
*page)
void clear_and_clean_page(struct page_info *page);
+/* routine for dirty-page tracing */
+#define VLPT_SIZE (1 << SECOND_SHIFT)
+#define VLPT_VA_TO_IDX(va) ((va - DOMHEAP_VIRT_START) >> SECOND_SHIFT)
+#define VLPT_IDX_TO_VA(idx) (DOMHEAP_VIRT_START + ((idx) << SECOND_SHIFT))
+#define INNER_IDX(i, s) ((i) % (s))
+#define OUTER_IDX(i, s) ((uint32_t)(i) / (uint32_t)(s))
+
+paddr_t get_gma_end(struct domain *d);
+int prepare_vlpt(struct domain *d);
+void cleanup_vlpt(struct domain *d);
+void restore_vlpt(struct domain *d);
+
+/* calculate the xen's virtual address for accessing the leaf PTE of
+ * a given address (GPA) */
+static inline lpae_t * get_vlpt_3lvl_pte(paddr_t addr)
+{
+ lpae_t *table = (lpae_t *)VIRT_LIN_P2M_START;
+
+ /* Since we slotted the guest's first p2m page table to xen's
+ * second page table, one shift is enough for calculating the
+ * index of guest p2m table entry */
+ return &table[addr >> PAGE_SHIFT];
+}
+
#endif /* __ARCH_ARM_MM__ */
/*
* Local variables:
--
1.8.1.2
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