Re: [Xen-devel] [PATCH v7 1/4] xen/arm: p2m: Clean cache PT when the IOMMU doesn't support coherent walk

[Ian Campbell <Ian.Campbell@xxxxxxxxxx>]

On Thu, 2014-05-15 at 15:16 +0100, Julien Grall wrote:
> Some IOMMU don't suppport coherent PT walk. When the p2m is shared with
> the CPU, Xen has to make sure the PT changes have reached the memory.
> 
> Introduce new IOMMU function that will check if the IOMMU feature is enabled
> for a specified domain.
> 
> On ARM, the platform can contain multiple IOMMUs. Each of them may not
> have the same set of feature. The domain parameter will be used to get the
> set of features for IOMMUs used by this domain.
> 
> Signed-off-by: Julien Grall <julien.grall@xxxxxxxxxx>

Acked-by: Ian Campbell <ian.campbell@xxxxxxxxxx> for the arm bit.

> @@ -548,10 +568,12 @@ int p2m_alloc_table(struct domain *d)
>      /* Clear both first level pages */
>      p = __map_domain_page(page);
>      clear_page(p);
> +    clean_xen_dcache_va_range(p, PAGE_SIZE);
>      unmap_domain_page(p);
>  
>      p = __map_domain_page(page + 1);
>      clear_page(p);
> +    clean_xen_dcache_va_range(p, PAGE_SIZE);


I wonder if we need clear_and_clean_page()?

>  
> +enum iommu_feature
> +{
> +    IOMMU_FEAT_COHERENT_WALK,
> +    IOMMU_FEAT_count,

Lowercase?

Ian.


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