[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [Xen-devel] [PATCH 3/4] x86/EPT: fix pinned cache attribute range checking
> From: Jan Beulich [mailto:JBeulich@xxxxxxxx] > Sent: Wednesday, April 23, 2014 4:41 PM > > This wasn't done properly by 4d66f069 ("x86: fix pinned cache attribute > handling"): The passed in GFN shouldn't be assumed to be order aligned. > > Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx> Acked-by: Kevin Tian <kevin.tian@xxxxxxxxx> > > --- a/xen/arch/x86/hvm/mtrr.c > +++ b/xen/arch/x86/hvm/mtrr.c > @@ -589,6 +589,7 @@ int hvm_get_mem_pinned_cacheattr( > uint32_t *type) > { > struct hvm_mem_pinned_cacheattr_range *range; > + uint64_t mask = ~(uint64_t)0 << order; > int rc = 0; > > *type = ~0; > @@ -601,15 +602,15 @@ int hvm_get_mem_pinned_cacheattr( > > &d->arch.hvm_domain.pinned_cacheattr_ranges, > list ) > { > - if ( (guest_fn >= range->start) && > - (guest_fn + (1UL << order) - 1 <= range->end) ) > + if ( ((guest_fn & mask) >= range->start) && > + ((guest_fn | ~mask) <= range->end) ) > { > *type = range->type; > rc = 1; > break; > } > - if ( (guest_fn <= range->end) && > - (range->start <= guest_fn + (1UL << order) - 1) ) > + if ( ((guest_fn & mask) <= range->end) && > + (range->start <= (guest_fn | ~mask)) ) > { > rc = -1; > break; > > _______________________________________________ Xen-devel mailing list Xen-devel@xxxxxxxxxxxxx http://lists.xen.org/xen-devel
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