[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [Xen-devel] [PATCH v5 RESEND 06/17] intel/VPMU: MSR_CORE_PERF_GLOBAL_CTRL should be initialized to zero
MSR_CORE_PERF_GLOBAL_CTRL register should be set zero initially. It is up to the guest to set it so that counters are enabled. Signed-off-by: Boris Ostrovsky <boris.ostrovsky@xxxxxxxxxx> --- xen/arch/x86/hvm/vmx/vpmu_core2.c | 10 +--------- 1 file changed, 1 insertion(+), 9 deletions(-) diff --git a/xen/arch/x86/hvm/vmx/vpmu_core2.c b/xen/arch/x86/hvm/vmx/vpmu_core2.c index c16ae10..c66289a 100644 --- a/xen/arch/x86/hvm/vmx/vpmu_core2.c +++ b/xen/arch/x86/hvm/vmx/vpmu_core2.c @@ -164,13 +164,6 @@ static int core2_get_fixed_pmc_count(void) return ( (eax & PMU_FIXED_NR_MASK) >> PMU_FIXED_NR_SHIFT ); } -static u64 core2_calc_intial_glb_ctrl_msr(void) -{ - int arch_pmc_bits = (1 << arch_pmc_cnt) - 1; - u64 fix_pmc_bits = (1 << fixed_pmc_cnt) - 1; - return ( (fix_pmc_bits << 32) | arch_pmc_bits ); -} - /* edx bits 5-12: Bit width of fixed-function performance counters */ static int core2_get_bitwidth_fix_count(void) { @@ -373,8 +366,7 @@ static int core2_vpmu_alloc_resource(struct vcpu *v) if ( vmx_add_guest_msr(MSR_CORE_PERF_GLOBAL_CTRL) ) goto out_err; - vmx_write_guest_msr(MSR_CORE_PERF_GLOBAL_CTRL, - core2_calc_intial_glb_ctrl_msr()); + vmx_write_guest_msr(MSR_CORE_PERF_GLOBAL_CTRL, 0); core2_vpmu_cxt = xzalloc_bytes(sizeof(struct core2_vpmu_context) + (arch_pmc_cnt-1)*sizeof(struct arch_msr_pair)); -- 1.8.3.1 _______________________________________________ Xen-devel mailing list Xen-devel@xxxxxxxxxxxxx http://lists.xen.org/xen-devel
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