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Hi Anthony and Julien,

We are trying to run Xen 4.4 on the Arndale Octa board (Exynos 5420).Â

The Xen and dom0's kernel is successfully loaded but Xen cannot start. The last output information in serial console is Starting kernel.

In order to figure out the reason, we tried to use the early_printk to print out the message before console is initialized. However, the message we got is some garbling message after the "Start kernel..." message. Julien suggests this may be caused by the different rate of clock on Exynos 5420 and Exynos 5250.Â

We looked at the fileÂxen/arch/arm/arm32/debug-exynos4210.inc, the clock it chooses is MPLL 800MHz, but based on the output of our Exynos 5420 board, our clock information is as follows:Â

CPU: Exynos5420 Rev2.0 [Samsung SOC on SMP Platform Base on ARM CortexA15]

APLL = 800MHz, KPLL = 600MHz

MPLL = 532MHz, BPLL = 800MHz

Our question is:

1) Is there any patch for the debug-exynos4210.inc file to support our board?

2) How should we change the code in debug-exynos4210.inc file to make it work on our board?Â

3) We tried to find the manual of setting the clocks so that we can change the following code accordingly. However, we cannot find it. Could you please refer to us some manual to achieve that?

  27 .macroÂearly_uart_initÂrbÂrcÂrd

  28 ÂÂÂÂÂÂÂÂ/*ÂinitÂclockÂ*/

  29 ÂÂÂÂÂÂÂÂldrÂÂÂ\rc,Â=0x10020000

  30 ÂÂÂÂÂÂÂÂ/*ÂselectÂMPLLÂ(800MHz)ÂsourceÂclockÂ*/

  31 ÂÂÂÂÂÂÂÂldrÂÂÂ\rd,Â[\rc,Â#0x250]

  32 ÂÂÂÂÂÂÂÂandÂÂÂ\rd,Â\rd,Â#(~(0xf<<8))

  33 ÂÂÂÂÂÂÂÂorrÂÂÂ\rd,Â\rd,Â#(0x6<<8)

  34 ÂÂÂÂÂÂÂÂstrÂÂÂ\rd,Â[\rc,Â#0x250]

  35 ÂÂÂÂÂÂÂÂ/*ÂratioÂ800/(7+1)Â*/

  36 ÂÂÂÂÂÂÂÂldrÂÂÂ\rd,Â[\rc,Â#0x558]

  37 ÂÂÂÂÂÂÂÂandÂÂÂ\rd,Â\rd,Â#(~(0xf<<8))

  38 ÂÂÂÂÂÂÂÂorrÂÂÂ\rd,Â\rd,Â#(0x7<<8)

  39 ÂÂÂÂÂÂÂÂstrÂÂÂ\rd,Â[\rc,Â#0x558]

(We think we need to change the above code in the debug-exynos4210.inc. Correct us if we are wrong. Or should we change anything else?)

Thank you very much for your time and help in this question!

Best,

Hyonyoung

-------------------------------------
Graduate School of Convergence IT, Korea University

Research Professor,
Hyonoung Choi, Ph.D.

Graduate School of Convergence IT, Korea University,
5-Ga, Anam-Dong, Sungbuk-Gu, Seoul 136-701, Republic of Korea.
TelÂÂÂ : +82-(0)2-3290-3640
Mobile : +82-(0)10-5353-0414
E-mail : neongas@xxxxxxxxxxx, commani@xxxxxxxxx
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[Xen-devel] [Xen-ARM] Modify the clock frequency for early printk