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Re: [Xen-devel] [PATCH v4 6/6] xen: arm: relax barriers when flushing caches

To: Tim Deegan <tim@xxxxxxx>
From: Ian Campbell <Ian.Campbell@xxxxxxxxxx>
Date: Thu, 3 Apr 2014 14:00:58 +0100
Cc: julien.grall@xxxxxxxxxx, stefano.stabellini@xxxxxxxxxxxxx, xen-devel@xxxxxxxxxxxxx
Delivery-date: Thu, 03 Apr 2014 13:01:07 +0000
List-id: Xen developer discussion <xen-devel.lists.xen.org>

On Thu, 2014-04-03 at 14:55 +0200, Tim Deegan wrote:
> At 09:59 +0100 on 03 Apr (1396515585), Ian Campbell wrote:
> > We only need an inner shareable barrier here.
> 
> Following the logic we had earlier, do the earlier dsbs here only need
> to be store barriers?

I think so, and I'm considering doing that in a followup patch.

Ian.


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References:
- [Xen-devel] [PATCH v4 0/6 ] xen: arm: smp & tlb cleanups
  - From: Ian Campbell
- [Xen-devel] [PATCH v4 6/6] xen: arm: relax barriers when flushing caches
  - From: Ian Campbell
- Re: [Xen-devel] [PATCH v4 6/6] xen: arm: relax barriers when flushing caches
  - From: Tim Deegan

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