[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [Xen-devel] [PATCH 2/3] xen: arm: flush TLB on all CPUs when setting or clearing fixmaps
On Wed, 2014-04-02 at 15:46 +0100, Julien Grall wrote: > On 04/02/2014 03:12 PM, Ian Campbell wrote: > > These mappings are global and therefore need flushing on all processors. Add > > flush_all_xen_data_tlb_range_va which accomplishes this. > > I think remove_early_mappings should also use flush_xen_data_range_va. Probably. I'll make that change too. > I'm wondering why BOOT_FDT_VIRT_START is removed so late (i.e in > discard_initial_modules). It can be done once the DTB is copied in setup_mm. I'm not sure, I think it just seemed like a convenient place to do it. Feel free to move it earlier. > > +/* > > + * Flush a range of VA's hypervisor mappings from the data TLB on all > > + * processors in the inner-shareable domain. This is not sufficient > > + * when changing code mappings or for self modifying code. > > + */ > > +static inline void flush_xen_data_tlb_range_va(unsigned long va, > > + unsigned long size) > > +{ > > + unsigned long end = va + size; > > + dsb(sy); /* Ensure preceding are visible */ > > + while ( va < end ) { > > + asm volatile(STORE_CP32(0, TLBIMVAHIS) > > + : : "r" (va) : "memory"); > > + va += PAGE_SIZE; > > + } > > + dsb(sy); /* Ensure completion of the TLB flush */ > > + isb(); > > +} > > + > > This loop is exactly the same on arm64 (except the TLBIMVAHIS), is it > possible to have a common code like clean_xen_dcache_va_range? flush_xen_data_tlb_range_va_local has the same issue. I'll fix them both. Ian. _______________________________________________ Xen-devel mailing list Xen-devel@xxxxxxxxxxxxx http://lists.xen.org/xen-devel
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