[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [Xen-devel] [PATCH v6 03/10] xen/arm: set GICH_HCR_UIE if all the LRs are in use
On return to guest, if there are no free LRs and we still have more interrupt to inject, set GICH_HCR_UIE so that we are going to receive a maintenance interrupt when no pending interrupts are present in the LR registers. The maintenance interrupt handler won't do anything anymore, but receiving the interrupt is going to cause gic_inject to be called on return to guest that is going to clear the old LRs and inject new interrupts. Signed-off-by: Stefano Stabellini <stefano.stabellini@xxxxxxxxxxxxx> Acked-by: Julien Grall <julien.grall@xxxxxxxxxx> --- Changes in v5: - introduce lr_all_full() helper. Changes in v2: - disable/enable the GICH_HCR_UIE bit in GICH_HCR; - only enable GICH_HCR_UIE if this_cpu(lr_mask) == ((1 << nr_lrs) - 1). --- xen/arch/arm/gic.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/xen/arch/arm/gic.c b/xen/arch/arm/gic.c index dbba5d3..a7b29d8 100644 --- a/xen/arch/arm/gic.c +++ b/xen/arch/arm/gic.c @@ -57,6 +57,7 @@ static DEFINE_PER_CPU(irq_desc_t[NR_LOCAL_IRQS], local_irq_desc); static DEFINE_PER_CPU(uint64_t, lr_mask); static unsigned nr_lrs; +#define lr_all_full() (this_cpu(lr_mask) == ((1 << nr_lrs) - 1)) /* The GIC mapping of CPU interfaces does not necessarily match the * logical CPU numbering. Let's use mapping as returned by the GIC @@ -738,6 +739,11 @@ void gic_inject(void) vgic_vcpu_inject_irq(current, current->domain->arch.evtchn_irq); gic_restore_pending_irqs(current); + + if ( !list_empty(¤t->arch.vgic.lr_pending) && lr_all_full() ) + GICH[GICH_HCR] |= GICH_HCR_UIE; + else + GICH[GICH_HCR] &= ~GICH_HCR_UIE; } int gic_route_irq_to_guest(struct domain *d, const struct dt_irq *irq, -- 1.7.10.4 _______________________________________________ Xen-devel mailing list Xen-devel@xxxxxxxxxxxxx http://lists.xen.org/xen-devel
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