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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [Xen-devel] [PATCH] VMX: fix PAT value seen by guest
Reviewed-by: Liu Jinsong <jinsong.liu@xxxxxxxxx>
BTW, today is my last wroking day at Intel, so this is my last email from
Intel's email box.
I will still in Xen community, but for this thread please cc my personal email
'liu-j-s@xxxxxxx' -- until I use new email box from Ali Cloud of Alibaba.
Thanks,
Jinsong
Jan Beulich wrote:
> The XSA-60 fixes introduced a window during which the guest PAT gets
> forced to all zeros. This shouldn't be visible to the guest. Therefore
> we need to intercept PAT MSR accesses during that time period.
>
> Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx>
>
> --- a/xen/arch/x86/hvm/vmx/vmx.c
> +++ b/xen/arch/x86/hvm/vmx/vmx.c
> @@ -1033,6 +1033,8 @@ static void vmx_handle_cd(struct vcpu *v
>
> vmx_get_guest_pat(v, pat);
> vmx_set_guest_pat(v, uc_pat);
> + vmx_enable_intercept_for_msr(v, MSR_IA32_CR_PAT,
> + MSR_TYPE_R | MSR_TYPE_W);
>
> wbinvd(); /* flush possibly polluted cache
> */ hvm_asid_flush_vcpu(v); /* invalidate memory type
> cached in TLB */ @@ -1042,6 +1044,9 @@ static void
> vmx_handle_cd(struct vcpu *v {
> v->arch.hvm_vcpu.cache_mode = NORMAL_CACHE_MODE;
> vmx_set_guest_pat(v, *pat);
> + if ( !iommu_enabled || iommu_snoop )
> + vmx_disable_intercept_for_msr(v, MSR_IA32_CR_PAT,
> + MSR_TYPE_R |
> MSR_TYPE_W); hvm_asid_flush_vcpu(v); /* no need to flush
> cache */ }
> }
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