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Re: [Xen-devel] [PATCH RFC v5 4/8] pvqspinlock, x86: Allow unfair spinlock in a real PV environment



The PV code in the v5 patch did seem to improve benchmark performance
with moderate to heavy spinlock contention. However, I didn't see much
CPU kicking going on. My theory is that the additional PV code
complicates the pause loop timing so that the hardware PLE didn't kick
in, whereas the original pause loop is pretty simple causing PLE to
happen fairly frequently.

you could play with ple_gap parameter to make it work for bigger
spin-loops in such cases.



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